arch/arm/boot/dts/s3c24xx.dtsi

// SPDX-License-Identifier: GPL-2.0
/*
 * Samsung's S3C24XX family device tree source
 *
 * Copyright (c) 2013 Heiko Stuebner <heiko@sntech.de>
 */

#include "skeleton.dtsi"

/ {
	compatible = "samsung,s3c24xx";
	interrupt-parent = <&intc>;

	aliases {
		pinctrl0 = &pinctrl_0;
		serial0 = &uart0;
		serial1 = &uart1;
		serial2 = &uart2;
	};

	intc:interrupt-controller@4a000000 {
		compatible = "samsung,s3c2410-irq";
		reg = <0x4a000000 0x100>;
		interrupt-controller;
		#interrupt-cells = <4>;
	};

	pinctrl_0: pinctrl@56000000 {
		reg = <0x56000000 0x1000>;

		wakeup-interrupt-controller {
			compatible = "samsung,s3c2410-wakeup-eint";
			interrupts = <0 0 0 3>,
				     <0 0 1 3>,
				     <0 0 2 3>,
				     <0 0 3 3>,
				     <0 0 4 4>,
				     <0 0 5 4>;
		};
	};

	timer@51000000 {
		compatible = "samsung,s3c2410-pwm";
		reg = <0x51000000 0x1000>;
		interrupts = <0 0 10 3>, <0 0 11 3>, <0 0 12 3>, <0 0 13 3>, <0 0 14 3>;
		#pwm-cells = <4>;
	};

	uart0: serial@50000000 {
		compatible = "samsung,s3c2410-uart";
		reg = <0x50000000 0x4000>;
		interrupts = <1 28 0 4>, <1 28 1 4>;
		status = "disabled";
	};

	uart1: serial@50004000 {
		compatible = "samsung,s3c2410-uart";
		reg = <0x50004000 0x4000>;
		interrupts = <1 23 3 4>, <1 23 4 4>;
		status = "disabled";
	};

	uart2: serial@50008000 {
		compatible = "samsung,s3c2410-uart";
		reg = <0x50008000 0x4000>;
		interrupts = <1 15 6 4>, <1 15 7 4>;
		status = "disabled";
	};

	watchdog@53000000 {
		compatible = "samsung,s3c2410-wdt";
		reg = <0x53000000 0x100>;
		interrupts = <0 0 9 3>;
		status = "disabled";
	};

	rtc@57000000 {
		compatible = "samsung,s3c2410-rtc";
		reg = <0x57000000 0x100>;
		interrupts = <0 0 30 3>, <0 0 8 3>;
		status = "disabled";
	};

	i2c@54000000 {
		compatible = "samsung,s3c2410-i2c";
		reg = <0x54000000 0x100>;
		interrupts = <0 0 27 3>;
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";
	};
};