| /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ | |
| /* | |
| * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. | |
| * Copyright (c) 2023, Linaro Limited | |
| */ | |
| #ifndef _DT_BINDINGS_CLK_QCOM_TCSR_CC_SM8650_H | |
| #define _DT_BINDINGS_CLK_QCOM_TCSR_CC_SM8650_H | |
| /* TCSR CC clocks */ | |
| #define TCSR_PCIE_0_CLKREF_EN 0 | |
| #define TCSR_PCIE_1_CLKREF_EN 1 | |
| #define TCSR_UFS_CLKREF_EN 2 | |
| #define TCSR_UFS_PAD_CLKREF_EN 3 | |
| #define TCSR_USB2_CLKREF_EN 4 | |
| #define TCSR_USB3_CLKREF_EN 5 | |
| #endif |