| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: Qualcomm SC7280 SoC LPASS LPI TLMM |
| |
| maintainers: |
| - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> |
| |
| description: |
| Top Level Mode Multiplexer pin controller in the Low Power Audio SubSystem |
| (LPASS) Low Power Island (LPI) of Qualcomm SC7280 SoC. |
| |
| properties: |
| compatible: |
| const: qcom,sc7280-lpass-lpi-pinctrl |
| |
| reg: |
| maxItems: 2 |
| |
| patternProperties: |
| "-state$": |
| oneOf: |
| - $ref: "#/$defs/qcom-sc7280-lpass-state" |
| - patternProperties: |
| "-pins$": |
| $ref: "#/$defs/qcom-sc7280-lpass-state" |
| additionalProperties: false |
| |
| $defs: |
| qcom-sc7280-lpass-state: |
| type: object |
| description: |
| Pinctrl node's client devices use subnodes for desired pin configuration. |
| Client device subnodes use below standard properties. |
| $ref: qcom,lpass-lpi-common.yaml#/$defs/qcom-tlmm-state |
| unevaluatedProperties: false |
| |
| properties: |
| pins: |
| description: |
| List of gpio pins affected by the properties specified in this |
| subnode. |
| items: |
| oneOf: |
| - pattern: "^gpio([0-9]|1[0-4])$" |
| minItems: 1 |
| maxItems: 15 |
| |
| function: |
| enum: [ gpio, swr_tx_clk, qua_mi2s_sclk, swr_tx_data, qua_mi2s_ws, |
| qua_mi2s_data, swr_rx_clk, swr_rx_data, dmic1_clk, i2s1_clk, |
| dmic1_data, i2s1_ws, dmic2_clk, dmic2_data, i2s1_data, |
| i2s2_clk, wsa_swr_clk, i2s2_ws, wsa_swr_data, dmic3_clk, |
| dmic3_data, i2s2_data ] |
| description: |
| Specify the alternative function to be configured for the specified |
| pins. |
| |
| required: |
| - compatible |
| - reg |
| |
| allOf: |
| - $ref: qcom,lpass-lpi-common.yaml# |
| |
| unevaluatedProperties: false |
| |
| examples: |
| - | |
| lpass_tlmm: pinctrl@33c0000 { |
| compatible = "qcom,sc7280-lpass-lpi-pinctrl"; |
| reg = <0x33c0000 0x20000>, |
| <0x3550000 0x10000>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| gpio-ranges = <&lpass_tlmm 0 0 15>; |
| |
| dmic01-state { |
| dmic01-clk-pins { |
| pins = "gpio6"; |
| function = "dmic1_clk"; |
| }; |
| |
| dmic01-clk-sleep-pins { |
| pins = "gpio6"; |
| function = "dmic1_clk"; |
| }; |
| }; |
| |
| tx-swr-data-sleep-state { |
| pins = "gpio1", "gpio2", "gpio14"; |
| function = "swr_tx_data"; |
| }; |
| }; |