/* Only for QMP V5 PHY - PCS_PCIE registers */ | |
/* SPDX-License-Identifier: GPL-2.0 */ | |
/* | |
* Copyright (c) 2017, The Linux Foundation. All rights reserved. | |
*/ | |
#ifndef QCOM_PHY_QMP_PCS_PCIE_V5_H_ | |
#define QCOM_PHY_QMP_PCS_PCIE_V5_H_ | |
/* Only for QMP V5 PHY - PCS_PCIE registers */ | |
#define QPHY_V5_PCS_PCIE_ENDPOINT_REFCLK_DRIVE 0x20 | |
#define QPHY_V5_PCS_PCIE_INT_AUX_CLK_CONFIG1 0x54 | |
#define QPHY_V5_PCS_PCIE_OSC_DTCT_ACTIONS 0x94 | |
#define QPHY_V5_PCS_PCIE_EQ_CONFIG2 0xa8 | |
#endif |