arch/arm64/boot/dts/qcom/ipq9574-al02-c7.dts

// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
 * IPQ9574 AL02-C7 board device tree source
 *
 * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved.
 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
 */

/dts-v1/;

#include "ipq9574.dtsi"

/ {
	model = "Qualcomm Technologies, Inc. IPQ9574/AP-AL02-C7";
	compatible = "qcom,ipq9574-ap-al02-c7", "qcom,ipq9574";

	aliases {
		serial0 = &blsp1_uart2;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};
};

&blsp1_uart2 {
	pinctrl-0 = <&uart2_pins>;
	pinctrl-names = "default";
	status = "okay";
};

&sdhc_1 {
	pinctrl-0 = <&sdc_default_state>;
	pinctrl-names = "default";
	mmc-ddr-1_8v;
	mmc-hs200-1_8v;
	mmc-hs400-1_8v;
	mmc-hs400-enhanced-strobe;
	max-frequency = <384000000>;
	bus-width = <8>;
	status = "okay";
};

&sleep_clk {
	clock-frequency = <32000>;
};

&tlmm {
	sdc_default_state: sdc-default-state {
		clk-pins {
			pins = "gpio5";
			function = "sdc_clk";
			drive-strength = <8>;
			bias-disable;
		};

		cmd-pins {
			pins = "gpio4";
			function = "sdc_cmd";
			drive-strength = <8>;
			bias-pull-up;
		};

		data-pins {
			pins = "gpio0", "gpio1", "gpio2",
			       "gpio3", "gpio6", "gpio7",
			       "gpio8", "gpio9";
			function = "sdc_data";
			drive-strength = <8>;
			bias-pull-up;
		};

		rclk-pins {
			pins = "gpio10";
			function = "sdc_rclk";
			drive-strength = <8>;
			bias-pull-down;
		};
	};
};

&xo_board_clk {
	clock-frequency = <24000000>;
};