Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-de-clks.yaml

# SPDX-License-Identifier: GPL-2.0+
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-de-clks.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Allwinner A80 Display Engine Clock Controller

maintainers:
  - Chen-Yu Tsai <wens@csie.org>
  - Maxime Ripard <mripard@kernel.org>

properties:
  "#clock-cells":
    const: 1

  "#reset-cells":
    const: 1

  compatible:
    const: allwinner,sun9i-a80-de-clks

  reg:
    maxItems: 1

  clocks:
    items:
      - description: Bus Clock
      - description: RAM Bus Clock
      - description: Module Clock

  clock-names:
    items:
      - const: mod
      - const: dram
      - const: bus

  resets:
    maxItems: 1

required:
  - "#clock-cells"
  - "#reset-cells"
  - compatible
  - reg
  - clocks
  - clock-names
  - resets

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/sun9i-a80-ccu.h>
    #include <dt-bindings/reset/sun9i-a80-ccu.h>

    de_clocks: clock@3000000 {
        compatible = "allwinner,sun9i-a80-de-clks";
        reg = <0x03000000 0x30>;
        clocks = <&ccu CLK_DE>, <&ccu CLK_SDRAM>, <&ccu CLK_BUS_DE>;
        clock-names = "mod", "dram", "bus";
        resets = <&ccu RST_BUS_DE>;
        #clock-cells = <1>;
        #reset-cells = <1>;
    };

...