| # SPDX-License-Identifier: GPL-2.0-only |
| # |
| # MediaTek SoC drivers |
| # |
| menu "MediaTek SoC drivers" |
| depends on ARCH_MEDIATEK || COMPILE_TEST |
| |
| config MTK_CMDQ |
| tristate "MediaTek CMDQ Support" |
| depends on ARCH_MEDIATEK || COMPILE_TEST |
| select MAILBOX |
| select MTK_CMDQ_MBOX |
| select MTK_INFRACFG |
| help |
| Say yes here to add support for the MediaTek Command Queue (CMDQ) |
| driver. The CMDQ is used to help read/write registers with critical |
| time limitation, such as updating display configuration during the |
| vblank. |
| |
| config MTK_DEVAPC |
| tristate "Mediatek Device APC Support" |
| help |
| Say yes here to enable support for Mediatek Device APC driver. |
| This driver is mainly used to handle the violation which catches |
| unexpected transaction. |
| The violation information is logged for further analysis or |
| countermeasures. |
| |
| config MTK_INFRACFG |
| bool "MediaTek INFRACFG Support" |
| select REGMAP |
| help |
| Say yes here to add support for the MediaTek INFRACFG controller. The |
| INFRACFG controller contains various infrastructure registers not |
| directly associated to any device. |
| |
| config MTK_PMIC_WRAP |
| tristate "MediaTek PMIC Wrapper Support" |
| depends on RESET_CONTROLLER |
| depends on OF |
| select REGMAP |
| help |
| Say yes here to add support for MediaTek PMIC Wrapper found |
| on different MediaTek SoCs. The PMIC wrapper is a proprietary |
| hardware to connect the PMIC. |
| |
| config MTK_REGULATOR_COUPLER |
| bool "MediaTek SoC Regulator Coupler" if COMPILE_TEST |
| default ARCH_MEDIATEK |
| depends on REGULATOR |
| |
| config MTK_MMSYS |
| tristate "MediaTek MMSYS Support" |
| default ARCH_MEDIATEK |
| depends on HAS_IOMEM |
| depends on MTK_CMDQ || MTK_CMDQ=n |
| help |
| Say yes here to add support for the MediaTek Multimedia |
| Subsystem (MMSYS). |
| |
| config MTK_SVS |
| tristate "MediaTek Smart Voltage Scaling(SVS)" |
| depends on NVMEM_MTK_EFUSE && NVMEM |
| help |
| The Smart Voltage Scaling(SVS) engine is a piece of hardware |
| which has several controllers(banks) for calculating suitable |
| voltage to different power domains(CPU/GPU/CCI) according to |
| chip process corner, temperatures and other factors. Then DVFS |
| driver could apply SVS bank voltage to PMIC/Buck. |
| |
| endmenu |
