blob: 97d5e45abd1dec684b6961cb8f29e9b8658e130a [file] [log] [blame]
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Trogdor dts fragment for the boards with TI sn65dsi86 edp bridge
*
* Copyright 2021 Google LLC.
*/
&dsi0_out {
remote-endpoint = <&sn65dsi86_in>;
data-lanes = <0 1 2 3>;
};
edp_brij_i2c: &i2c2 {
status = "okay";
clock-frequency = <400000>;
sn65dsi86_bridge: bridge@2d {
compatible = "ti,sn65dsi86";
reg = <0x2d>;
pinctrl-names = "default";
pinctrl-0 = <&edp_brij_en>, <&edp_brij_irq>;
gpio-controller;
#gpio-cells = <2>;
interrupt-parent = <&tlmm>;
interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
enable-gpios = <&tlmm 104 GPIO_ACTIVE_HIGH>;
vpll-supply = <&pp1800_edp_vpll>;
vccio-supply = <&pp1800_brij_vccio>;
vcca-supply = <&pp1200_brij>;
vcc-supply = <&pp1200_brij>;
clocks = <&rpmhcc RPMH_LN_BB_CLK3>;
clock-names = "refclk";
no-hpd;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
sn65dsi86_in: endpoint {
remote-endpoint = <&dsi0_out>;
};
};
port@1 {
reg = <1>;
sn65dsi86_out: endpoint {
data-lanes = <0 1>;
remote-endpoint = <&panel_in_edp>;
};
};
};
aux-bus {
panel: panel {
/* Compatible will be filled in per-board */
power-supply = <&pp3300_dx_edp>;
backlight = <&backlight>;
hpd-gpios = <&sn65dsi86_bridge 2 GPIO_ACTIVE_HIGH>;
port {
panel_in_edp: endpoint {
remote-endpoint = <&sn65dsi86_out>;
};
};
};
};
};
};
&tlmm {
edp_brij_irq: edp-brij-irq {
pinmux {
pins = "gpio11";
function = "gpio";
};
pinconf {
pins = "gpio11";
drive-strength = <2>;
bias-pull-down;
};
};
};