Documentation/devicetree/bindings/rtc/xlnx,zynqmp-rtc.yaml

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/rtc/xlnx,zynqmp-rtc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Xilinx Zynq Ultrascale+ MPSoC Real Time Clock

description:
  RTC controller for the Xilinx Zynq MPSoC Real Time Clock.
  The RTC controller has separate IRQ lines for seconds and alarm.

maintainers:
  - Michal Simek <michal.simek@amd.com>

allOf:
  - $ref: rtc.yaml#

properties:
  compatible:
    oneOf:
      - const: xlnx,zynqmp-rtc
      - items:
          - enum:
              - xlnx,versal-rtc
              - xlnx,versal-net-rtc
          - const: xlnx,zynqmp-rtc

  reg:
    maxItems: 1

  clocks:
    maxItems: 1

  clock-names:
    items:
      - const: rtc

  interrupts:
    maxItems: 2

  interrupt-names:
    items:
      - const: alarm
      - const: sec

  calibration:
    description: |
      calibration value for 1 sec period which will
      be programmed directly to calibration register.
    $ref: /schemas/types.yaml#/definitions/uint32
    minimum: 0x1
    maximum: 0x1FFFFF
    default: 0x198233
    deprecated: true

  power-domains:
    maxItems: 1

required:
  - compatible
  - reg
  - interrupts
  - interrupt-names

additionalProperties: false

examples:
  - |
    soc {
      #address-cells = <2>;
      #size-cells = <2>;

      rtc: rtc@ffa60000 {
        compatible = "xlnx,zynqmp-rtc";
        reg = <0x0 0xffa60000 0x0 0x100>;
        interrupt-parent = <&gic>;
        interrupts = <0 26 4>, <0 27 4>;
        interrupt-names = "alarm", "sec";
        calibration = <0x198233>;
        clock-names = "rtc";
        clocks = <&rtc_clk>;
      };
    };