blob: 5baf83e5253d8c2a903eb22034e56e6b88bc1f78 [file] [log] [blame]
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/* Copyright (c) 2021, Marcel Ziswiler <marcel@ziswiler.com> */
/dts-v1/;
#include "armada-385.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
model = "Netgear GS110EMX";
compatible = "netgear,gs110emx", "marvell,armada380";
aliases {
/* So that mvebu u-boot can update the MAC addresses */
ethernet1 = &eth0;
};
chosen {
stdout-path = "serial0:115200n8";
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-0 = <&front_button_pins>;
pinctrl-names = "default";
key-factory-default {
label = "Factory Default";
gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
memory {
device_type = "memory";
reg = <0x00000000 0x08000000>; /* 128 MB */
};
soc {
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
internal-regs {
rtc@a3800 {
/*
* If the rtc doesn't work, run "date reset"
* twice in u-boot.
*/
status = "okay";
};
};
};
};
&eth0 {
/* ethernet@70000 */
bm,pool-long = <0>;
bm,pool-short = <1>;
buffer-manager = <&bm>;
phy-mode = "rgmii-id";
pinctrl-0 = <&ge0_rgmii_pins>;
pinctrl-names = "default";
status = "okay";
fixed-link {
full-duplex;
pause;
speed = <1000>;
};
};
&mdio {
pinctrl-names = "default";
pinctrl-0 = <&mdio_pins>;
status = "okay";
ethernet-switch@0 {
compatible = "marvell,mv88e6190";
#interrupt-cells = <2>;
interrupt-controller;
interrupt-parent = <&gpio1>;
interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
pinctrl-0 = <&switch_interrupt_pins>;
pinctrl-names = "default";
reg = <0>;
mdio {
#address-cells = <1>;
#size-cells = <0>;
switch0phy1: ethernet-phy@1 {
reg = <0x1>;
};
switch0phy2: ethernet-phy@2 {
reg = <0x2>;
};
switch0phy3: ethernet-phy@3 {
reg = <0x3>;
};
switch0phy4: ethernet-phy@4 {
reg = <0x4>;
};
switch0phy5: ethernet-phy@5 {
reg = <0x5>;
};
switch0phy6: ethernet-phy@6 {
reg = <0x6>;
};
switch0phy7: ethernet-phy@7 {
reg = <0x7>;
};
switch0phy8: ethernet-phy@8 {
reg = <0x8>;
};
};
mdio-external {
compatible = "marvell,mv88e6xxx-mdio-external";
#address-cells = <1>;
#size-cells = <0>;
phy1: ethernet-phy@b {
reg = <0xb>;
compatible = "ethernet-phy-ieee802.3-c45";
};
phy2: ethernet-phy@c {
reg = <0xc>;
compatible = "ethernet-phy-ieee802.3-c45";
};
};
ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
ethernet-port@0 {
ethernet = <&eth0>;
phy-mode = "rgmii";
reg = <0>;
fixed-link {
full-duplex;
pause;
speed = <1000>;
};
};
ethernet-port@1 {
label = "lan1";
phy-handle = <&switch0phy1>;
reg = <1>;
};
ethernet-port@2 {
label = "lan2";
phy-handle = <&switch0phy2>;
reg = <2>;
};
ethernet-port@3 {
label = "lan3";
phy-handle = <&switch0phy3>;
reg = <3>;
};
ethernet-port@4 {
label = "lan4";
phy-handle = <&switch0phy4>;
reg = <4>;
};
ethernet-port@5 {
label = "lan5";
phy-handle = <&switch0phy5>;
reg = <5>;
};
ethernet-port@6 {
label = "lan6";
phy-handle = <&switch0phy6>;
reg = <6>;
};
ethernet-port@7 {
label = "lan7";
phy-handle = <&switch0phy7>;
reg = <7>;
};
ethernet-port@8 {
label = "lan8";
phy-handle = <&switch0phy8>;
reg = <8>;
};
ethernet-port@9 {
/* 88X3310P external phy */
label = "lan9";
phy-handle = <&phy1>;
phy-mode = "xaui";
reg = <9>;
};
ethernet-port@a {
/* 88X3310P external phy */
label = "lan10";
phy-handle = <&phy2>;
phy-mode = "xaui";
reg = <0xa>;
};
};
};
};
&pinctrl {
front_button_pins: front-button-pins {
marvell,pins = "mpp38";
marvell,function = "gpio";
};
switch_interrupt_pins: switch-interrupt-pins {
marvell,pins = "mpp39";
marvell,function = "gpio";
};
};
&spi0 {
pinctrl-0 = <&spi0_pins>;
pinctrl-names = "default";
status = "okay";
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
reg = <0>; /* Chip select 0 */
spi-max-frequency = <3000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "boot";
read-only;
reg = <0x00000000 0x00100000>;
};
partition@100000 {
label = "env";
reg = <0x00100000 0x00010000>;
};
partition@200000 {
label = "rsv";
reg = <0x00110000 0x00010000>;
};
partition@300000 {
label = "image0";
reg = <0x00120000 0x00900000>;
};
partition@400000 {
label = "config";
reg = <0x00a20000 0x00300000>;
};
partition@480000 {
label = "debug";
reg = <0x00d20000 0x002e0000>;
};
};
};
};
&uart0 {
pinctrl-0 = <&uart0_pins>;
pinctrl-names = "default";
status = "okay";
};