blob: a6a58e51822d90f8815df880ea7e668caff1b1ec [file] [log] [blame]
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
#include "tegra210-p2180.dtsi"
#include "tegra210-p2597.dtsi"
/ {
model = "NVIDIA Jetson TX1 Developer Kit";
compatible = "nvidia,p2371-2180", "nvidia,tegra210";
pcie@1003000 {
status = "okay";
hvddio-pex-supply = <&vdd_1v8>;
dvddio-pex-supply = <&vdd_pex_1v05>;
vddio-pex-ctl-supply = <&vdd_1v8>;
pci@1,0 {
phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>,
<&{/padctl@7009f000/pads/pcie/lanes/pcie-1}>,
<&{/padctl@7009f000/pads/pcie/lanes/pcie-2}>,
<&{/padctl@7009f000/pads/pcie/lanes/pcie-3}>;
phy-names = "pcie-0", "pcie-1", "pcie-2", "pcie-3";
status = "okay";
};
pci@2,0 {
phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-4}>;
phy-names = "pcie-0";
status = "okay";
};
};
host1x@50000000 {
dsi@54300000 {
status = "okay";
avdd-dsi-csi-supply = <&vdd_dsi_csi>;
panel@0 {
compatible = "auo,b080uan01";
reg = <0>;
enable-gpios = <&gpio TEGRA_GPIO(V, 2)
GPIO_ACTIVE_HIGH>;
power-supply = <&vdd_5v0_io>;
backlight = <&backlight>;
};
};
};
i2c@7000c400 {
backlight: backlight@2c {
compatible = "ti,lp8557";
reg = <0x2c>;
power-supply = <&vdd_3v3_sys>;
dev-ctrl = /bits/ 8 <0x80>;
init-brt = /bits/ 8 <0xff>;
pwms = <&pwm 0 29334>;
pwm-names = "lp8557";
/* boost frequency 1 MHz */
rom-13h {
rom-addr = /bits/ 8 <0x13>;
rom-val = /bits/ 8 <0x01>;
};
/* 3 LED string */
rom-14h {
rom-addr = /bits/ 8 <0x14>;
rom-val = /bits/ 8 <0x87>;
};
};
};
i2c@7000c500 {
/* carrier board ID EEPROM */
eeprom@57 {
compatible = "atmel,24c02";
reg = <0x57>;
label = "system";
vcc-supply = <&vdd_1v8>;
address-width = <8>;
pagesize = <8>;
size = <256>;
read-only;
};
};
clock@70110000 {
status = "okay";
nvidia,cf = <6>;
nvidia,ci = <0>;
nvidia,cg = <2>;
nvidia,droop-ctrl = <0x00000f00>;
nvidia,force-mode = <1>;
nvidia,sample-rate = <25000>;
nvidia,pwm-min-microvolts = <708000>;
nvidia,pwm-period-nanoseconds = <2500>; /* 2.5us */
nvidia,pwm-to-pmic;
nvidia,pwm-tristate-microvolts = <1000000>;
nvidia,pwm-voltage-step-microvolts = <19200>;
pinctrl-names = "dvfs_pwm_enable", "dvfs_pwm_disable";
pinctrl-0 = <&dvfs_pwm_active_state>;
pinctrl-1 = <&dvfs_pwm_inactive_state>;
};
aconnect@702c0000 {
status = "okay";
ahub@702d0800 {
status = "okay";
admaif@702d0000 {
status = "okay";
};
i2s@702d1000 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
i2s1_cif_ep: endpoint {
remote-endpoint = <&xbar_i2s1_ep>;
};
};
i2s1_port: port@1 {
reg = <1>;
i2s1_dap_ep: endpoint {
dai-format = "i2s";
/* Placeholder for external Codec */
};
};
};
};
i2s@702d1100 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
i2s2_cif_ep: endpoint {
remote-endpoint = <&xbar_i2s2_ep>;
};
};
i2s2_port: port@1 {
reg = <1>;
i2s2_dap_ep: endpoint {
dai-format = "i2s";
/* Placeholder for external Codec */
};
};
};
};
i2s@702d1200 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
i2s3_cif_ep: endpoint {
remote-endpoint = <&xbar_i2s3_ep>;
};
};
i2s3_port: port@1 {
reg = <1>;
i2s3_dap_ep: endpoint {
dai-format = "i2s";
/* Placeholder for external Codec */
};
};
};
};
i2s@702d1300 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
i2s4_cif_ep: endpoint {
remote-endpoint = <&xbar_i2s4_ep>;
};
};
i2s4_port: port@1 {
reg = <1>;
i2s4_dap_ep: endpoint {
dai-format = "i2s";
/* Placeholder for external Codec */
};
};
};
};
i2s@702d1400 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
i2s5_cif_ep: endpoint {
remote-endpoint = <&xbar_i2s5_ep>;
};
};
i2s5_port: port@1 {
reg = <1>;
i2s5_dap_ep: endpoint {
dai-format = "i2s";
/* Placeholder for external Codec */
};
};
};
};
sfc@702d2000 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
sfc1_cif_in_ep: endpoint {
remote-endpoint = <&xbar_sfc1_in_ep>;
};
};
sfc1_out_port: port@1 {
reg = <1>;
sfc1_cif_out_ep: endpoint {
remote-endpoint = <&xbar_sfc1_out_ep>;
};
};
};
};
sfc@702d2200 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
sfc2_cif_in_ep: endpoint {
remote-endpoint = <&xbar_sfc2_in_ep>;
};
};
sfc2_out_port: port@1 {
reg = <1>;
sfc2_cif_out_ep: endpoint {
remote-endpoint = <&xbar_sfc2_out_ep>;
};
};
};
};
sfc@702d2400 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
sfc3_cif_in_ep: endpoint {
remote-endpoint = <&xbar_sfc3_in_ep>;
};
};
sfc3_out_port: port@1 {
reg = <1>;
sfc3_cif_out_ep: endpoint {
remote-endpoint = <&xbar_sfc3_out_ep>;
};
};
};
};
sfc@702d2600 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
sfc4_cif_in_ep: endpoint {
remote-endpoint = <&xbar_sfc4_in_ep>;
};
};
sfc4_out_port: port@1 {
reg = <1>;
sfc4_cif_out_ep: endpoint {
remote-endpoint = <&xbar_sfc4_out_ep>;
};
};
};
};
amx@702d3000 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
amx1_in1_ep: endpoint {
remote-endpoint = <&xbar_amx1_in1_ep>;
};
};
port@1 {
reg = <1>;
amx1_in2_ep: endpoint {
remote-endpoint = <&xbar_amx1_in2_ep>;
};
};
port@2 {
reg = <2>;
amx1_in3_ep: endpoint {
remote-endpoint = <&xbar_amx1_in3_ep>;
};
};
port@3 {
reg = <3>;
amx1_in4_ep: endpoint {
remote-endpoint = <&xbar_amx1_in4_ep>;
};
};
amx1_out_port: port@4 {
reg = <4>;
amx1_out_ep: endpoint {
remote-endpoint = <&xbar_amx1_out_ep>;
};
};
};
};
amx@702d3100 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
amx2_in1_ep: endpoint {
remote-endpoint = <&xbar_amx2_in1_ep>;
};
};
port@1 {
reg = <1>;
amx2_in2_ep: endpoint {
remote-endpoint = <&xbar_amx2_in2_ep>;
};
};
amx2_in3_port: port@2 {
reg = <2>;
amx2_in3_ep: endpoint {
remote-endpoint = <&xbar_amx2_in3_ep>;
};
};
amx2_in4_port: port@3 {
reg = <3>;
amx2_in4_ep: endpoint {
remote-endpoint = <&xbar_amx2_in4_ep>;
};
};
amx2_out_port: port@4 {
reg = <4>;
amx2_out_ep: endpoint {
remote-endpoint = <&xbar_amx2_out_ep>;
};
};
};
};
adx@702d3800 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
adx1_in_ep: endpoint {
remote-endpoint = <&xbar_adx1_in_ep>;
};
};
adx1_out1_port: port@1 {
reg = <1>;
adx1_out1_ep: endpoint {
remote-endpoint = <&xbar_adx1_out1_ep>;
};
};
adx1_out2_port: port@2 {
reg = <2>;
adx1_out2_ep: endpoint {
remote-endpoint = <&xbar_adx1_out2_ep>;
};
};
adx1_out3_port: port@3 {
reg = <3>;
adx1_out3_ep: endpoint {
remote-endpoint = <&xbar_adx1_out3_ep>;
};
};
adx1_out4_port: port@4 {
reg = <4>;
adx1_out4_ep: endpoint {
remote-endpoint = <&xbar_adx1_out4_ep>;
};
};
};
};
adx@702d3900 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
adx2_in_ep: endpoint {
remote-endpoint = <&xbar_adx2_in_ep>;
};
};
adx2_out1_port: port@1 {
reg = <1>;
adx2_out1_ep: endpoint {
remote-endpoint = <&xbar_adx2_out1_ep>;
};
};
adx2_out2_port: port@2 {
reg = <2>;
adx2_out2_ep: endpoint {
remote-endpoint = <&xbar_adx2_out2_ep>;
};
};
adx2_out3_port: port@3 {
reg = <3>;
adx2_out3_ep: endpoint {
remote-endpoint = <&xbar_adx2_out3_ep>;
};
};
adx2_out4_port: port@4 {
reg = <4>;
adx2_out4_ep: endpoint {
remote-endpoint = <&xbar_adx2_out4_ep>;
};
};
};
};
dmic@702d4000 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dmic1_cif_ep: endpoint {
remote-endpoint = <&xbar_dmic1_ep>;
};
};
dmic1_port: port@1 {
reg = <1>;
dmic1_dap_ep: endpoint {
/* Placeholder for external Codec */
};
};
};
};
dmic@702d4100 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dmic2_cif_ep: endpoint {
remote-endpoint = <&xbar_dmic2_ep>;
};
};
dmic2_port: port@1 {
reg = <1>;
dmic2_dap_ep: endpoint {
/* Placeholder for external Codec */
};
};
};
};
dmic@702d4200 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dmic3_cif_ep: endpoint {
remote-endpoint = <&xbar_dmic3_ep>;
};
};
dmic3_port: port@1 {
reg = <1>;
dmic3_dap_ep: endpoint {
/* Placeholder for external Codec */
};
};
};
};
processing-engine@702d8000 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0x0>;
ope1_cif_in_ep: endpoint {
remote-endpoint = <&xbar_ope1_in_ep>;
};
};
ope1_out_port: port@1 {
reg = <0x1>;
ope1_cif_out_ep: endpoint {
remote-endpoint = <&xbar_ope1_out_ep>;
};
};
};
};
processing-engine@702d8400 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0x0>;
ope2_cif_in_ep: endpoint {
remote-endpoint = <&xbar_ope2_in_ep>;
};
};
ope2_out_port: port@1 {
reg = <0x1>;
ope2_cif_out_ep: endpoint {
remote-endpoint = <&xbar_ope2_out_ep>;
};
};
};
};
mvc@702da000 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
mvc1_cif_in_ep: endpoint {
remote-endpoint = <&xbar_mvc1_in_ep>;
};
};
mvc1_out_port: port@1 {
reg = <1>;
mvc1_cif_out_ep: endpoint {
remote-endpoint = <&xbar_mvc1_out_ep>;
};
};
};
};
mvc@702da200 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
mvc2_cif_in_ep: endpoint {
remote-endpoint = <&xbar_mvc2_in_ep>;
};
};
mvc2_out_port: port@1 {
reg = <1>;
mvc2_cif_out_ep: endpoint {
remote-endpoint = <&xbar_mvc2_out_ep>;
};
};
};
};
amixer@702dbb00 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0x0>;
mixer_in1_ep: endpoint {
remote-endpoint = <&xbar_mixer_in1_ep>;
};
};
port@1 {
reg = <0x1>;
mixer_in2_ep: endpoint {
remote-endpoint = <&xbar_mixer_in2_ep>;
};
};
port@2 {
reg = <0x2>;
mixer_in3_ep: endpoint {
remote-endpoint = <&xbar_mixer_in3_ep>;
};
};
port@3 {
reg = <0x3>;
mixer_in4_ep: endpoint {
remote-endpoint = <&xbar_mixer_in4_ep>;
};
};
port@4 {
reg = <0x4>;
mixer_in5_ep: endpoint {
remote-endpoint = <&xbar_mixer_in5_ep>;
};
};
port@5 {
reg = <0x5>;
mixer_in6_ep: endpoint {
remote-endpoint = <&xbar_mixer_in6_ep>;
};
};
port@6 {
reg = <0x6>;
mixer_in7_ep: endpoint {
remote-endpoint = <&xbar_mixer_in7_ep>;
};
};
port@7 {
reg = <0x7>;
mixer_in8_ep: endpoint {
remote-endpoint = <&xbar_mixer_in8_ep>;
};
};
port@8 {
reg = <0x8>;
mixer_in9_ep: endpoint {
remote-endpoint = <&xbar_mixer_in9_ep>;
};
};
port@9 {
reg = <0x9>;
mixer_in10_ep: endpoint {
remote-endpoint = <&xbar_mixer_in10_ep>;
};
};
mixer_out1_port: port@a {
reg = <0xa>;
mixer_out1_ep: endpoint {
remote-endpoint = <&xbar_mixer_out1_ep>;
};
};
mixer_out2_port: port@b {
reg = <0xb>;
mixer_out2_ep: endpoint {
remote-endpoint = <&xbar_mixer_out2_ep>;
};
};
mixer_out3_port: port@c {
reg = <0xc>;
mixer_out3_ep: endpoint {
remote-endpoint = <&xbar_mixer_out3_ep>;
};
};
mixer_out4_port: port@d {
reg = <0xd>;
mixer_out4_ep: endpoint {
remote-endpoint = <&xbar_mixer_out4_ep>;
};
};
mixer_out5_port: port@e {
reg = <0xe>;
mixer_out5_ep: endpoint {
remote-endpoint = <&xbar_mixer_out5_ep>;
};
};
};
};
ports {
xbar_i2s1_port: port@a {
reg = <0xa>;
xbar_i2s1_ep: endpoint {
remote-endpoint = <&i2s1_cif_ep>;
};
};
xbar_i2s2_port: port@b {
reg = <0xb>;
xbar_i2s2_ep: endpoint {
remote-endpoint = <&i2s2_cif_ep>;
};
};
xbar_i2s3_port: port@c {
reg = <0xc>;
xbar_i2s3_ep: endpoint {
remote-endpoint = <&i2s3_cif_ep>;
};
};
xbar_i2s4_port: port@d {
reg = <0xd>;
xbar_i2s4_ep: endpoint {
remote-endpoint = <&i2s4_cif_ep>;
};
};
xbar_i2s5_port: port@e {
reg = <0xe>;
xbar_i2s5_ep: endpoint {
remote-endpoint = <&i2s5_cif_ep>;
};
};
xbar_dmic1_port: port@f {
reg = <0xf>;
xbar_dmic1_ep: endpoint {
remote-endpoint = <&dmic1_cif_ep>;
};
};
xbar_dmic2_port: port@10 {
reg = <0x10>;
xbar_dmic2_ep: endpoint {
remote-endpoint = <&dmic2_cif_ep>;
};
};
xbar_dmic3_port: port@11 {
reg = <0x11>;
xbar_dmic3_ep: endpoint {
remote-endpoint = <&dmic3_cif_ep>;
};
};
xbar_sfc1_in_port: port@12 {
reg = <0x12>;
xbar_sfc1_in_ep: endpoint {
remote-endpoint = <&sfc1_cif_in_ep>;
};
};
port@13 {
reg = <0x13>;
xbar_sfc1_out_ep: endpoint {
remote-endpoint = <&sfc1_cif_out_ep>;
};
};
xbar_sfc2_in_port: port@14 {
reg = <0x14>;
xbar_sfc2_in_ep: endpoint {
remote-endpoint = <&sfc2_cif_in_ep>;
};
};
port@15 {
reg = <0x15>;
xbar_sfc2_out_ep: endpoint {
remote-endpoint = <&sfc2_cif_out_ep>;
};
};
xbar_sfc3_in_port: port@16 {
reg = <0x16>;
xbar_sfc3_in_ep: endpoint {
remote-endpoint = <&sfc3_cif_in_ep>;
};
};
port@17 {
reg = <0x17>;
xbar_sfc3_out_ep: endpoint {
remote-endpoint = <&sfc3_cif_out_ep>;
};
};
xbar_sfc4_in_port: port@18 {
reg = <0x18>;
xbar_sfc4_in_ep: endpoint {
remote-endpoint = <&sfc4_cif_in_ep>;
};
};
port@19 {
reg = <0x19>;
xbar_sfc4_out_ep: endpoint {
remote-endpoint = <&sfc4_cif_out_ep>;
};
};
xbar_mvc1_in_port: port@1a {
reg = <0x1a>;
xbar_mvc1_in_ep: endpoint {
remote-endpoint = <&mvc1_cif_in_ep>;
};
};
port@1b {
reg = <0x1b>;
xbar_mvc1_out_ep: endpoint {
remote-endpoint = <&mvc1_cif_out_ep>;
};
};
xbar_mvc2_in_port: port@1c {
reg = <0x1c>;
xbar_mvc2_in_ep: endpoint {
remote-endpoint = <&mvc2_cif_in_ep>;
};
};
port@1d {
reg = <0x1d>;
xbar_mvc2_out_ep: endpoint {
remote-endpoint = <&mvc2_cif_out_ep>;
};
};
xbar_amx1_in1_port: port@1e {
reg = <0x1e>;
xbar_amx1_in1_ep: endpoint {
remote-endpoint = <&amx1_in1_ep>;
};
};
xbar_amx1_in2_port: port@1f {
reg = <0x1f>;
xbar_amx1_in2_ep: endpoint {
remote-endpoint = <&amx1_in2_ep>;
};
};
xbar_amx1_in3_port: port@20 {
reg = <0x20>;
xbar_amx1_in3_ep: endpoint {
remote-endpoint = <&amx1_in3_ep>;
};
};
xbar_amx1_in4_port: port@21 {
reg = <0x21>;
xbar_amx1_in4_ep: endpoint {
remote-endpoint = <&amx1_in4_ep>;
};
};
port@22 {
reg = <0x22>;
xbar_amx1_out_ep: endpoint {
remote-endpoint = <&amx1_out_ep>;
};
};
xbar_amx2_in1_port: port@23 {
reg = <0x23>;
xbar_amx2_in1_ep: endpoint {
remote-endpoint = <&amx2_in1_ep>;
};
};
xbar_amx2_in2_port: port@24 {
reg = <0x24>;
xbar_amx2_in2_ep: endpoint {
remote-endpoint = <&amx2_in2_ep>;
};
};
xbar_amx2_in3_port: port@25 {
reg = <0x25>;
xbar_amx2_in3_ep: endpoint {
remote-endpoint = <&amx2_in3_ep>;
};
};
xbar_amx2_in4_port: port@26 {
reg = <0x26>;
xbar_amx2_in4_ep: endpoint {
remote-endpoint = <&amx2_in4_ep>;
};
};
port@27 {
reg = <0x27>;
xbar_amx2_out_ep: endpoint {
remote-endpoint = <&amx2_out_ep>;
};
};
xbar_adx1_in_port: port@28 {
reg = <0x28>;
xbar_adx1_in_ep: endpoint {
remote-endpoint = <&adx1_in_ep>;
};
};
port@29 {
reg = <0x29>;
xbar_adx1_out1_ep: endpoint {
remote-endpoint = <&adx1_out1_ep>;
};
};
port@2a {
reg = <0x2a>;
xbar_adx1_out2_ep: endpoint {
remote-endpoint = <&adx1_out2_ep>;
};
};
port@2b {
reg = <0x2b>;
xbar_adx1_out3_ep: endpoint {
remote-endpoint = <&adx1_out3_ep>;
};
};
port@2c {
reg = <0x2c>;
xbar_adx1_out4_ep: endpoint {
remote-endpoint = <&adx1_out4_ep>;
};
};
xbar_adx2_in_port: port@2d {
reg = <0x2d>;
xbar_adx2_in_ep: endpoint {
remote-endpoint = <&adx2_in_ep>;
};
};
port@2e {
reg = <0x2e>;
xbar_adx2_out1_ep: endpoint {
remote-endpoint = <&adx2_out1_ep>;
};
};
port@2f {
reg = <0x2f>;
xbar_adx2_out2_ep: endpoint {
remote-endpoint = <&adx2_out2_ep>;
};
};
port@30 {
reg = <0x30>;
xbar_adx2_out3_ep: endpoint {
remote-endpoint = <&adx2_out3_ep>;
};
};
port@31 {
reg = <0x31>;
xbar_adx2_out4_ep: endpoint {
remote-endpoint = <&adx2_out4_ep>;
};
};
xbar_mixer_in1_port: port@32 {
reg = <0x32>;
xbar_mixer_in1_ep: endpoint {
remote-endpoint = <&mixer_in1_ep>;
};
};
xbar_mixer_in2_port: port@33 {
reg = <0x33>;
xbar_mixer_in2_ep: endpoint {
remote-endpoint = <&mixer_in2_ep>;
};
};
xbar_mixer_in3_port: port@34 {
reg = <0x34>;
xbar_mixer_in3_ep: endpoint {
remote-endpoint = <&mixer_in3_ep>;
};
};
xbar_mixer_in4_port: port@35 {
reg = <0x35>;
xbar_mixer_in4_ep: endpoint {
remote-endpoint = <&mixer_in4_ep>;
};
};
xbar_mixer_in5_port: port@36 {
reg = <0x36>;
xbar_mixer_in5_ep: endpoint {
remote-endpoint = <&mixer_in5_ep>;
};
};
xbar_mixer_in6_port: port@37 {
reg = <0x37>;
xbar_mixer_in6_ep: endpoint {
remote-endpoint = <&mixer_in6_ep>;
};
};
xbar_mixer_in7_port: port@38 {
reg = <0x38>;
xbar_mixer_in7_ep: endpoint {
remote-endpoint = <&mixer_in7_ep>;
};
};
xbar_mixer_in8_port: port@39 {
reg = <0x39>;
xbar_mixer_in8_ep: endpoint {
remote-endpoint = <&mixer_in8_ep>;
};
};
xbar_mixer_in9_port: port@3a {
reg = <0x3a>;
xbar_mixer_in9_ep: endpoint {
remote-endpoint = <&mixer_in9_ep>;
};
};
xbar_mixer_in10_port: port@3b {
reg = <0x3b>;
xbar_mixer_in10_ep: endpoint {
remote-endpoint = <&mixer_in10_ep>;
};
};
port@3c {
reg = <0x3c>;
xbar_mixer_out1_ep: endpoint {
remote-endpoint = <&mixer_out1_ep>;
};
};
port@3d {
reg = <0x3d>;
xbar_mixer_out2_ep: endpoint {
remote-endpoint = <&mixer_out2_ep>;
};
};
port@3e {
reg = <0x3e>;
xbar_mixer_out3_ep: endpoint {
remote-endpoint = <&mixer_out3_ep>;
};
};
port@3f {
reg = <0x3f>;
xbar_mixer_out4_ep: endpoint {
remote-endpoint = <&mixer_out4_ep>;
};
};
port@40 {
reg = <0x40>;
xbar_mixer_out5_ep: endpoint {
remote-endpoint = <&mixer_out5_ep>;
};
};
xbar_ope1_in_port: port@41 {
reg = <0x41>;
xbar_ope1_in_ep: endpoint {
remote-endpoint = <&ope1_cif_in_ep>;
};
};
port@42 {
reg = <0x42>;
xbar_ope1_out_ep: endpoint {
remote-endpoint = <&ope1_cif_out_ep>;
};
};
xbar_ope2_in_port: port@43 {
reg = <0x43>;
xbar_ope2_in_ep: endpoint {
remote-endpoint = <&ope2_cif_in_ep>;
};
};
port@44 {
reg = <0x44>;
xbar_ope2_out_ep: endpoint {
remote-endpoint = <&ope2_cif_out_ep>;
};
};
};
};
dma-controller@702e2000 {
status = "okay";
};
interrupt-controller@702f9000 {
status = "okay";
};
};
sound {
compatible = "nvidia,tegra210-audio-graph-card";
status = "okay";
dais = /* FE */
<&admaif1_port>, <&admaif2_port>, <&admaif3_port>,
<&admaif4_port>, <&admaif5_port>, <&admaif6_port>,
<&admaif7_port>, <&admaif8_port>, <&admaif9_port>,
<&admaif10_port>,
/* Router */
<&xbar_i2s1_port>, <&xbar_i2s2_port>, <&xbar_i2s3_port>,
<&xbar_i2s4_port>, <&xbar_i2s5_port>, <&xbar_dmic1_port>,
<&xbar_dmic2_port>, <&xbar_dmic3_port>,
<&xbar_sfc1_in_port>, <&xbar_sfc2_in_port>,
<&xbar_sfc3_in_port>, <&xbar_sfc4_in_port>,
<&xbar_mvc1_in_port>, <&xbar_mvc2_in_port>,
<&xbar_amx1_in1_port>, <&xbar_amx1_in2_port>,
<&xbar_amx1_in3_port>, <&xbar_amx1_in4_port>,
<&xbar_amx2_in1_port>, <&xbar_amx2_in2_port>,
<&xbar_amx2_in3_port>, <&xbar_amx2_in4_port>,
<&xbar_adx1_in_port>, <&xbar_adx2_in_port>,
<&xbar_mixer_in1_port>, <&xbar_mixer_in2_port>,
<&xbar_mixer_in3_port>, <&xbar_mixer_in4_port>,
<&xbar_mixer_in5_port>, <&xbar_mixer_in6_port>,
<&xbar_mixer_in7_port>, <&xbar_mixer_in8_port>,
<&xbar_mixer_in9_port>, <&xbar_mixer_in10_port>,
<&xbar_ope1_in_port>, <&xbar_ope2_in_port>,
/* HW accelerators */
<&sfc1_out_port>, <&sfc2_out_port>,
<&sfc3_out_port>, <&sfc4_out_port>,
<&mvc1_out_port>, <&mvc2_out_port>,
<&amx1_out_port>, <&amx2_out_port>,
<&adx1_out1_port>, <&adx1_out2_port>,
<&adx1_out3_port>, <&adx1_out4_port>,
<&adx2_out1_port>, <&adx2_out2_port>,
<&adx2_out3_port>, <&adx2_out4_port>,
<&mixer_out1_port>, <&mixer_out2_port>,
<&mixer_out3_port>, <&mixer_out4_port>,
<&mixer_out5_port>,
<&ope1_out_port>, <&ope2_out_port>,
/* I/O DAP Ports */
<&i2s1_port>, <&i2s2_port>, <&i2s3_port>, <&i2s4_port>,
<&i2s5_port>, <&dmic1_port>, <&dmic2_port>, <&dmic3_port>;
label = "NVIDIA Jetson TX1 APE";
};
};