| # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) |
| # Copyright 2019 BayLibre, SAS |
| %YAML 1.2 |
| --- |
| $id: "http://devicetree.org/schemas/spi/amlogic,meson-gx-spicc.yaml#" |
| $schema: "http://devicetree.org/meta-schemas/core.yaml#" |
| |
| title: Amlogic Meson SPI Communication Controller |
| |
| maintainers: |
| - Neil Armstrong <neil.armstrong@linaro.org> |
| |
| description: | |
| The Meson SPICC is a generic SPI controller for general purpose Full-Duplex |
| communications with dedicated 16 words RX/TX PIO FIFOs. |
| |
| properties: |
| compatible: |
| enum: |
| - amlogic,meson-gx-spicc # SPICC controller on Amlogic GX and compatible SoCs |
| - amlogic,meson-axg-spicc # SPICC controller on Amlogic AXG and compatible SoCs |
| - amlogic,meson-g12a-spicc # SPICC controller on Amlogic G12A and compatible SoCs |
| |
| interrupts: |
| maxItems: 1 |
| |
| reg: |
| maxItems: 1 |
| |
| resets: |
| maxItems: 1 |
| |
| clocks: |
| minItems: 1 |
| items: |
| - description: controller register bus clock |
| - description: baud rate generator and delay control clock |
| |
| clock-names: |
| minItems: 1 |
| maxItems: 2 |
| |
| allOf: |
| - $ref: "spi-controller.yaml#" |
| - if: |
| properties: |
| compatible: |
| contains: |
| enum: |
| - amlogic,meson-g12a-spicc |
| |
| then: |
| properties: |
| clocks: |
| minItems: 2 |
| |
| clock-names: |
| items: |
| - const: core |
| - const: pclk |
| |
| else: |
| properties: |
| clocks: |
| maxItems: 1 |
| |
| clock-names: |
| items: |
| - const: core |
| |
| - if: |
| properties: |
| compatible: |
| contains: |
| enum: |
| - amlogic,meson-gx-spicc |
| |
| then: |
| properties: |
| pinctrl-0: true |
| pinctrl-1: true |
| pinctrl-2: true |
| |
| pinctrl-names: |
| minItems: 1 |
| items: |
| - const: default |
| - const: idle-high |
| - const: idle-low |
| |
| required: |
| - compatible |
| - reg |
| - interrupts |
| - clocks |
| - clock-names |
| |
| unevaluatedProperties: false |
| |
| examples: |
| - | |
| spi@c1108d80 { |
| compatible = "amlogic,meson-gx-spicc"; |
| reg = <0xc1108d80 0x80>; |
| interrupts = <112>; |
| clocks = <&clk81>; |
| clock-names = "core"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| display@0 { |
| compatible = "lg,lg4573"; |
| spi-max-frequency = <1000000>; |
| reg = <0>; |
| }; |
| }; |