| /* SPDX-License-Identifier: GPL-2.0-only */ | |
| /* | |
| * Tegra host1x Register Offsets for Tegra20 and Tegra30 | |
| * | |
| * Copyright (c) 2010-2013 NVIDIA Corporation. | |
| */ | |
| #ifndef __HOST1X_HOST1X01_HARDWARE_H | |
| #define __HOST1X_HOST1X01_HARDWARE_H | |
| #include <linux/types.h> | |
| #include <linux/bitops.h> | |
| #include "hw_host1x01_channel.h" | |
| #include "hw_host1x01_sync.h" | |
| #include "hw_host1x01_uclass.h" | |
| #include "opcodes.h" | |
| #endif |