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// SPDX-License-Identifier: GPL-2.0
/*
* Check Point L-50 Board Description
* Copyright 2020 Pawel Dembicki <paweldembicki@gmail.com>
*/
/dts-v1/;
#include "kirkwood.dtsi"
#include "kirkwood-6281.dtsi"
/ {
model = "Check Point L-50";
compatible = "checkpoint,l-50", "marvell,kirkwood-88f6281", "marvell,kirkwood";
memory {
device_type = "memory";
reg = <0x00000000 0x20000000>;
};
chosen {
bootargs = "console=ttyS0,115200n8";
stdout-path = &uart0;
};
ocp@f1000000 {
pinctrl: pin-controller@10000 {
pinctrl-0 = <&pmx_led38 &pmx_sysrst &pmx_button29>;
pinctrl-names = "default";
pmx_sysrst: pmx-sysrst {
marvell,pins = "mpp6";
marvell,function = "sysrst";
};
pmx_button29: pmx_button29 {
marvell,pins = "mpp29";
marvell,function = "gpio";
};
pmx_led38: pmx_led38 {
marvell,pins = "mpp38";
marvell,function = "gpio";
};
pmx_sdio_cd: pmx-sdio-cd {
marvell,pins = "mpp46";
marvell,function = "gpio";
};
};
serial@12000 {
status = "okay";
};
mvsdio@90000 {
status = "okay";
cd-gpios = <&gpio1 14 9>;
};
i2c@11000 {
status = "okay";
clock-frequency = <400000>;
gpio2: gpio-expander@20 {
#gpio-cells = <2>;
#interrupt-cells = <2>;
interrupt-controller;
compatible = "semtech,sx1505q";
reg = <0x20>;
gpio-controller;
};
/* Three GPIOs from 0x21 exp. are undescribed in dts:
* 1: DSL module reset (active low)
* 5: mPCIE reset (active low)
* 6: Express card reset (active low)
*/
gpio3: gpio-expander@21 {
#gpio-cells = <2>;
#interrupt-cells = <2>;
interrupt-controller;
compatible = "semtech,sx1505q";
reg = <0x21>;
gpio-controller;
};
rtc@30 {
compatible = "s35390a";
reg = <0x30>;
};
};
};
leds {
compatible = "gpio-leds";
status_green {
label = "l-50:green:status";
gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
};
status_red {
label = "l-50:red:status";
gpios = <&gpio3 2 GPIO_ACTIVE_LOW>;
};
wifi {
label = "l-50:green:wifi";
gpios = <&gpio2 7 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
internet_green {
label = "l-50:green:internet";
gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
};
internet_red {
label = "l-50:red:internet";
gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
};
usb1_green {
label = "l-50:green:usb1";
gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
linux,default-trigger = "usbport";
trigger-sources = <&hub_port3>;
};
usb1_red {
label = "l-50:red:usb1";
gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
};
usb2_green {
label = "l-50:green:usb2";
gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
linux,default-trigger = "usbport";
trigger-sources = <&hub_port1>;
};
usb2_red {
label = "l-50:red:usb2";
gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
};
};
usb2_pwr {
compatible = "regulator-fixed";
regulator-name = "usb2_pwr";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio3 3 GPIO_ACTIVE_LOW>;
regulator-always-on;
};
usb1_pwr {
compatible = "regulator-fixed";
regulator-name = "usb1_pwr";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio3 4 GPIO_ACTIVE_LOW>;
regulator-always-on;
};
mpcie_pwr {
compatible = "regulator-fixed";
regulator-name = "mpcie_pwr";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio3 5 GPIO_ACTIVE_HIGH>;
enable-active-high;
regulator-always-on;
};
express_card_pwr {
compatible = "regulator-fixed";
regulator-name = "express_card_pwr";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio3 7 GPIO_ACTIVE_HIGH>;
enable-active-high;
regulator-always-on;
};
keys {
compatible = "gpio-keys";
factory_defaults {
label = "factory_defaults";
gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
};
&mdio {
status = "okay";
ethphy8: ethernet-phy@8 {
reg = <0x08>;
};
switch0: switch@10 {
compatible = "marvell,mv88e6085";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x10>;
dsa,member = <0 0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan5";
};
port@1 {
reg = <1>;
label = "lan1";
};
port@2 {
reg = <2>;
label = "lan6";
};
port@3 {
reg = <3>;
label = "lan2";
};
port@4 {
reg = <4>;
label = "lan7";
};
switch0port5: port@5 {
reg = <5>;
phy-mode = "rgmii-txid";
link = <&switch1port5>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
port@6 {
reg = <6>;
phy-mode = "rgmii-id";
ethernet = <&eth1port>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};
switch@11 {
compatible = "marvell,mv88e6085";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x11>;
dsa,member = <0 1>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan3";
};
port@1 {
reg = <1>;
label = "lan8";
};
port@2 {
reg = <2>;
label = "lan4";
};
port@3 {
reg = <3>;
label = "dmz";
};
switch1port5: port@5 {
reg = <5>;
phy-mode = "rgmii-txid";
link = <&switch0port5>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
port@6 {
reg = <6>;
label = "dsl";
fixed-link {
speed = <100>;
full-duplex;
};
};
};
};
};
&eth0 {
status = "okay";
ethernet0-port@0 {
phy-handle = <&ethphy8>;
};
};
&eth1 {
status = "okay";
ethernet1-port@0 {
speed = <1000>;
duplex = <1>;
phy-mode = "rgmii";
};
};
&nand {
status = "okay";
pinctrl-0 = <&pmx_nand>;
pinctrl-names = "default";
partition@0 {
label = "u-boot";
reg = <0x00000000 0x000c0000>;
};
partition@a0000 {
label = "bootldr-env";
reg = <0x000c0000 0x00040000>;
};
partition@100000 {
label = "kernel-1";
reg = <0x00100000 0x00800000>;
};
partition@900000 {
label = "rootfs-1";
reg = <0x00900000 0x07100000>;
};
partition@7a00000 {
label = "kernel-2";
reg = <0x07a00000 0x00800000>;
};
partition@8200000 {
label = "rootfs-2";
reg = <0x08200000 0x07100000>;
};
partition@f300000 {
label = "default_sw";
reg = <0x0f300000 0x07900000>;
};
partition@16c00000 {
label = "logs";
reg = <0x16c00000 0x01800000>;
};
partition@18400000 {
label = "preset_cfg";
reg = <0x18400000 0x00100000>;
};
partition@18500000 {
label = "adsl";
reg = <0x18500000 0x00100000>;
};
partition@18600000 {
label = "storage";
reg = <0x18600000 0x07a00000>;
};
};
&rtc {
status = "disabled";
};
&pciec {
status = "okay";
};
&pcie0 {
status = "okay";
};
&sata_phy0 {
status = "disabled";
};
&sata_phy1 {
status = "disabled";
};
&usb0 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
#trigger-source-cells = <0>;
hub_port1: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
hub_port3: port@3 {
reg = <3>;
#trigger-source-cells = <0>;
};
};
};