blob: fee5e71112799293b2e873d8fc1f5dbe12003301 [file] [log] [blame]
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd
*/
/ {
cluster0_opp: opp-table-0 {
compatible = "operating-points-v2";
opp-shared;
opp00 {
opp-hz = /bits/ 64 <408000000>;
opp-microvolt = <825000 825000 1250000>;
clock-latency-ns = <40000>;
};
opp01 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <825000 825000 1250000>;
};
opp02 {
opp-hz = /bits/ 64 <816000000>;
opp-microvolt = <850000 850000 1250000>;
};
opp03 {
opp-hz = /bits/ 64 <1008000000>;
opp-microvolt = <925000 925000 1250000>;
};
opp04 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <1000000 1000000 1250000>;
};
opp05 {
opp-hz = /bits/ 64 <1416000000>;
opp-microvolt = <1125000 1125000 1250000>;
};
};
cluster1_opp: opp-table-1 {
compatible = "operating-points-v2";
opp-shared;
opp00 {
opp-hz = /bits/ 64 <408000000>;
opp-microvolt = <825000 825000 1250000>;
clock-latency-ns = <40000>;
};
opp01 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <825000 825000 1250000>;
};
opp02 {
opp-hz = /bits/ 64 <816000000>;
opp-microvolt = <825000 825000 1250000>;
};
opp03 {
opp-hz = /bits/ 64 <1008000000>;
opp-microvolt = <875000 875000 1250000>;
};
opp04 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <950000 950000 1250000>;
};
opp05 {
opp-hz = /bits/ 64 <1416000000>;
opp-microvolt = <1025000 1025000 1250000>;
};
opp06 {
opp-hz = /bits/ 64 <1608000000>;
opp-microvolt = <1100000 1100000 1250000>;
};
opp07 {
opp-hz = /bits/ 64 <1800000000>;
opp-microvolt = <1200000 1200000 1250000>;
};
};
gpu_opp_table: opp-table-2 {
compatible = "operating-points-v2";
opp00 {
opp-hz = /bits/ 64 <200000000>;
opp-microvolt = <825000 825000 1150000>;
};
opp01 {
opp-hz = /bits/ 64 <297000000>;
opp-microvolt = <825000 825000 1150000>;
};
opp02 {
opp-hz = /bits/ 64 <400000000>;
opp-microvolt = <825000 825000 1150000>;
};
opp03 {
opp-hz = /bits/ 64 <500000000>;
opp-microvolt = <875000 875000 1150000>;
};
opp04 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <925000 925000 1150000>;
};
opp05 {
opp-hz = /bits/ 64 <800000000>;
opp-microvolt = <1100000 1100000 1150000>;
};
};
};
&cpu_l0 {
operating-points-v2 = <&cluster0_opp>;
};
&cpu_l1 {
operating-points-v2 = <&cluster0_opp>;
};
&cpu_l2 {
operating-points-v2 = <&cluster0_opp>;
};
&cpu_l3 {
operating-points-v2 = <&cluster0_opp>;
};
&cpu_b0 {
operating-points-v2 = <&cluster1_opp>;
};
&cpu_b1 {
operating-points-v2 = <&cluster1_opp>;
};
&gpu {
operating-points-v2 = <&gpu_opp_table>;
};