| // SPDX-License-Identifier: GPL-2.0-only |
| /* |
| * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ |
| */ |
| |
| / { |
| cpus { |
| cpu@0 { |
| cpu0-supply = <&dcdc2_reg>; |
| }; |
| }; |
| |
| memory@80000000 { |
| device_type = "memory"; |
| reg = <0x80000000 0x10000000>; /* 256 MB */ |
| }; |
| |
| chosen { |
| stdout-path = &uart0; |
| }; |
| |
| leds { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&user_leds_s0>; |
| |
| compatible = "gpio-leds"; |
| |
| led2 { |
| label = "beaglebone:green:heartbeat"; |
| gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; |
| linux,default-trigger = "heartbeat"; |
| default-state = "off"; |
| }; |
| |
| led3 { |
| label = "beaglebone:green:mmc0"; |
| gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>; |
| linux,default-trigger = "mmc0"; |
| default-state = "off"; |
| }; |
| |
| led4 { |
| label = "beaglebone:green:usr2"; |
| gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>; |
| linux,default-trigger = "cpu0"; |
| default-state = "off"; |
| }; |
| |
| led5 { |
| label = "beaglebone:green:usr3"; |
| gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>; |
| linux,default-trigger = "mmc1"; |
| default-state = "off"; |
| }; |
| }; |
| |
| vmmcsd_fixed: fixedregulator0 { |
| compatible = "regulator-fixed"; |
| regulator-name = "vmmcsd_fixed"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| }; |
| }; |
| |
| &am33xx_pinmux { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&clkout2_pin>; |
| |
| user_leds_s0: user_leds_s0 { |
| pinctrl-single,pins = < |
| AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a5.gpio1_21 */ |
| AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gpmc_a6.gpio1_22 */ |
| AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a7.gpio1_23 */ |
| AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gpmc_a8.gpio1_24 */ |
| >; |
| }; |
| |
| i2c0_pins: pinmux_i2c0_pins { |
| pinctrl-single,pins = < |
| AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLUP, MUX_MODE0) /* i2c0_sda.i2c0_sda */ |
| AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLUP, MUX_MODE0) /* i2c0_scl.i2c0_scl */ |
| >; |
| }; |
| |
| i2c2_pins: pinmux_i2c2_pins { |
| pinctrl-single,pins = < |
| AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* uart1_ctsn.i2c2_sda */ |
| AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* uart1_rtsn.i2c2_scl */ |
| >; |
| }; |
| |
| uart0_pins: pinmux_uart0_pins { |
| pinctrl-single,pins = < |
| AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0) |
| >; |
| }; |
| |
| clkout2_pin: pinmux_clkout2_pin { |
| pinctrl-single,pins = < |
| AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_OUTPUT_PULLDOWN, MUX_MODE3) /* xdma_event_intr1.clkout2 */ |
| >; |
| }; |
| |
| cpsw_default: cpsw_default { |
| pinctrl-single,pins = < |
| /* Slave 1 */ |
| AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLUP, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLUP, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLUP, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLUP, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLUP, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLUP, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLUP, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLUP, MUX_MODE0) |
| >; |
| }; |
| |
| cpsw_sleep: cpsw_sleep { |
| pinctrl-single,pins = < |
| /* Slave 1 reset value */ |
| AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| >; |
| }; |
| |
| davinci_mdio_default: davinci_mdio_default { |
| pinctrl-single,pins = < |
| /* MDIO */ |
| AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0) |
| >; |
| }; |
| |
| davinci_mdio_sleep: davinci_mdio_sleep { |
| pinctrl-single,pins = < |
| /* MDIO reset value */ |
| AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| >; |
| }; |
| |
| mmc1_pins: pinmux_mmc1_pins { |
| pinctrl-single,pins = < |
| AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT, MUX_MODE7) /* spio0_cs1.gpio0_6 */ |
| AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0) |
| >; |
| }; |
| |
| emmc_pins: pinmux_emmc_pins { |
| pinctrl-single,pins = < |
| AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn1.mmc1_clk */ |
| AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn2.mmc1_cmd */ |
| AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */ |
| AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */ |
| AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */ |
| AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */ |
| AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */ |
| AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */ |
| AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */ |
| AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */ |
| >; |
| }; |
| }; |
| |
| &uart0 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&uart0_pins>; |
| |
| status = "okay"; |
| }; |
| |
| &usb0 { |
| dr_mode = "peripheral"; |
| interrupts-extended = <&intc 18 &tps 0>; |
| interrupt-names = "mc", "vbus"; |
| }; |
| |
| &usb1 { |
| dr_mode = "host"; |
| }; |
| |
| &i2c0 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&i2c0_pins>; |
| |
| status = "okay"; |
| clock-frequency = <400000>; |
| |
| tps: tps@24 { |
| reg = <0x24>; |
| }; |
| |
| baseboard_eeprom: baseboard_eeprom@50 { |
| compatible = "atmel,24c256"; |
| reg = <0x50>; |
| |
| #address-cells = <1>; |
| #size-cells = <1>; |
| baseboard_data: baseboard_data@0 { |
| reg = <0 0x100>; |
| }; |
| }; |
| }; |
| |
| &i2c2 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&i2c2_pins>; |
| |
| status = "okay"; |
| clock-frequency = <100000>; |
| |
| cape_eeprom0: cape_eeprom0@54 { |
| compatible = "atmel,24c256"; |
| reg = <0x54>; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| cape0_data: cape_data@0 { |
| reg = <0 0x100>; |
| }; |
| }; |
| |
| cape_eeprom1: cape_eeprom1@55 { |
| compatible = "atmel,24c256"; |
| reg = <0x55>; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| cape1_data: cape_data@0 { |
| reg = <0 0x100>; |
| }; |
| }; |
| |
| cape_eeprom2: cape_eeprom2@56 { |
| compatible = "atmel,24c256"; |
| reg = <0x56>; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| cape2_data: cape_data@0 { |
| reg = <0 0x100>; |
| }; |
| }; |
| |
| cape_eeprom3: cape_eeprom3@57 { |
| compatible = "atmel,24c256"; |
| reg = <0x57>; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| cape3_data: cape_data@0 { |
| reg = <0 0x100>; |
| }; |
| }; |
| }; |
| |
| |
| /include/ "tps65217.dtsi" |
| |
| &tps { |
| /* |
| * Configure pmic to enter OFF-state instead of SLEEP-state ("RTC-only |
| * mode") at poweroff. Most BeagleBone versions do not support RTC-only |
| * mode and risk hardware damage if this mode is entered. |
| * |
| * For details, see linux-omap mailing list May 2015 thread |
| * [PATCH] ARM: dts: am335x-bone* enable pmic-shutdown-controller |
| * In particular, messages: |
| * http://www.spinics.net/lists/linux-omap/msg118585.html |
| * http://www.spinics.net/lists/linux-omap/msg118615.html |
| * |
| * You can override this later with |
| * &tps { /delete-property/ ti,pmic-shutdown-controller; } |
| * if you want to use RTC-only mode and made sure you are not affected |
| * by the hardware problems. (Tip: double-check by performing a current |
| * measurement after shutdown: it should be less than 1 mA.) |
| */ |
| |
| interrupts = <7>; /* NMI */ |
| interrupt-parent = <&intc>; |
| |
| ti,pmic-shutdown-controller; |
| |
| charger { |
| status = "okay"; |
| }; |
| |
| pwrbutton { |
| status = "okay"; |
| }; |
| |
| regulators { |
| dcdc1_reg: regulator@0 { |
| regulator-name = "vdds_dpr"; |
| regulator-always-on; |
| }; |
| |
| dcdc2_reg: regulator@1 { |
| /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ |
| regulator-name = "vdd_mpu"; |
| regulator-min-microvolt = <925000>; |
| regulator-max-microvolt = <1351500>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| dcdc3_reg: regulator@2 { |
| /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ |
| regulator-name = "vdd_core"; |
| regulator-min-microvolt = <925000>; |
| regulator-max-microvolt = <1150000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| ldo1_reg: regulator@3 { |
| regulator-name = "vio,vrtc,vdds"; |
| regulator-always-on; |
| }; |
| |
| ldo2_reg: regulator@4 { |
| regulator-name = "vdd_3v3aux"; |
| regulator-always-on; |
| }; |
| |
| ldo3_reg: regulator@5 { |
| regulator-name = "vdd_1v8"; |
| regulator-always-on; |
| }; |
| |
| ldo4_reg: regulator@6 { |
| regulator-name = "vdd_3v3a"; |
| regulator-always-on; |
| }; |
| }; |
| }; |
| |
| &cpsw_emac0 { |
| phy-handle = <ðphy0>; |
| phy-mode = "mii"; |
| }; |
| |
| &mac { |
| slaves = <1>; |
| pinctrl-names = "default", "sleep"; |
| pinctrl-0 = <&cpsw_default>; |
| pinctrl-1 = <&cpsw_sleep>; |
| status = "okay"; |
| }; |
| |
| &davinci_mdio { |
| pinctrl-names = "default", "sleep"; |
| pinctrl-0 = <&davinci_mdio_default>; |
| pinctrl-1 = <&davinci_mdio_sleep>; |
| status = "okay"; |
| |
| ethphy0: ethernet-phy@0 { |
| reg = <0>; |
| }; |
| }; |
| |
| &mmc1 { |
| status = "okay"; |
| bus-width = <0x4>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&mmc1_pins>; |
| cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; |
| }; |
| |
| &aes { |
| status = "okay"; |
| }; |
| |
| &sham { |
| status = "okay"; |
| }; |
| |
| &rtc { |
| clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>; |
| clock-names = "ext-clk", "int-clk"; |
| }; |
