| // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| /* |
| * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd |
| */ |
| |
| /dts-v1/; |
| #include <dt-bindings/pwm/pwm.h> |
| #include "rk3399.dtsi" |
| |
| / { |
| model = "Rockchip RK3399 Evaluation Board"; |
| compatible = "rockchip,rk3399-evb", "rockchip,rk3399", |
| "google,rk3399evb-rev2"; |
| |
| backlight: backlight { |
| compatible = "pwm-backlight"; |
| brightness-levels = < |
| 0 1 2 3 4 5 6 7 |
| 8 9 10 11 12 13 14 15 |
| 16 17 18 19 20 21 22 23 |
| 24 25 26 27 28 29 30 31 |
| 32 33 34 35 36 37 38 39 |
| 40 41 42 43 44 45 46 47 |
| 48 49 50 51 52 53 54 55 |
| 56 57 58 59 60 61 62 63 |
| 64 65 66 67 68 69 70 71 |
| 72 73 74 75 76 77 78 79 |
| 80 81 82 83 84 85 86 87 |
| 88 89 90 91 92 93 94 95 |
| 96 97 98 99 100 101 102 103 |
| 104 105 106 107 108 109 110 111 |
| 112 113 114 115 116 117 118 119 |
| 120 121 122 123 124 125 126 127 |
| 128 129 130 131 132 133 134 135 |
| 136 137 138 139 140 141 142 143 |
| 144 145 146 147 148 149 150 151 |
| 152 153 154 155 156 157 158 159 |
| 160 161 162 163 164 165 166 167 |
| 168 169 170 171 172 173 174 175 |
| 176 177 178 179 180 181 182 183 |
| 184 185 186 187 188 189 190 191 |
| 192 193 194 195 196 197 198 199 |
| 200 201 202 203 204 205 206 207 |
| 208 209 210 211 212 213 214 215 |
| 216 217 218 219 220 221 222 223 |
| 224 225 226 227 228 229 230 231 |
| 232 233 234 235 236 237 238 239 |
| 240 241 242 243 244 245 246 247 |
| 248 249 250 251 252 253 254 255>; |
| default-brightness-level = <200>; |
| enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; |
| pwms = <&pwm0 0 25000 0>; |
| }; |
| |
| clkin_gmac: external-gmac-clock { |
| compatible = "fixed-clock"; |
| clock-frequency = <125000000>; |
| clock-output-names = "clkin_gmac"; |
| #clock-cells = <0>; |
| }; |
| |
| vdd_center: vdd-center { |
| compatible = "pwm-regulator"; |
| pwms = <&pwm3 0 25000 0>; |
| regulator-name = "vdd_center"; |
| regulator-min-microvolt = <800000>; |
| regulator-max-microvolt = <1400000>; |
| regulator-always-on; |
| regulator-boot-on; |
| status = "okay"; |
| }; |
| |
| vcc3v3_sys: vcc3v3-sys { |
| compatible = "regulator-fixed"; |
| regulator-name = "vcc3v3_sys"; |
| regulator-always-on; |
| regulator-boot-on; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| }; |
| |
| vcc5v0_sys: vcc5v0-sys { |
| compatible = "regulator-fixed"; |
| regulator-name = "vcc5v0_sys"; |
| regulator-always-on; |
| regulator-boot-on; |
| regulator-min-microvolt = <5000000>; |
| regulator-max-microvolt = <5000000>; |
| }; |
| |
| vcc5v0_host: vcc5v0-host-regulator { |
| compatible = "regulator-fixed"; |
| enable-active-high; |
| gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&vcc5v0_host_en>; |
| regulator-name = "vcc5v0_host"; |
| vin-supply = <&vcc5v0_sys>; |
| }; |
| |
| vcc_phy: vcc-phy-regulator { |
| compatible = "regulator-fixed"; |
| regulator-name = "vcc_phy"; |
| regulator-always-on; |
| regulator-boot-on; |
| }; |
| |
| vcc_phy: vcc-phy-regulator { |
| compatible = "regulator-fixed"; |
| regulator-name = "vcc_phy"; |
| regulator-always-on; |
| regulator-boot-on; |
| }; |
| |
| }; |
| |
| &emmc_phy { |
| status = "okay"; |
| }; |
| |
| &gmac { |
| assigned-clocks = <&cru SCLK_RMII_SRC>; |
| assigned-clock-parents = <&clkin_gmac>; |
| clock_in_out = "input"; |
| phy-supply = <&vcc_phy>; |
| phy-mode = "rgmii"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&rgmii_pins>; |
| snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; |
| snps,reset-active-low; |
| snps,reset-delays-us = <0 10000 50000>; |
| tx_delay = <0x28>; |
| rx_delay = <0x11>; |
| status = "okay"; |
| }; |
| |
| &pwm0 { |
| status = "okay"; |
| }; |
| |
| &pwm2 { |
| status = "okay"; |
| }; |
| |
| &pwm3 { |
| status = "okay"; |
| }; |
| |
| &sdhci { |
| bus-width = <8>; |
| mmc-hs400-1_8v; |
| mmc-hs400-enhanced-strobe; |
| non-removable; |
| status = "okay"; |
| }; |
| |
| &pcie_phy { |
| status = "disabled"; |
| }; |
| |
| &pcie0 { |
| ep-gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_HIGH>; |
| num-lanes = <4>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pcie_clkreqn_cpm>; |
| status = "disabled"; |
| }; |
| |
| &u2phy0 { |
| status = "okay"; |
| }; |
| |
| &u2phy0_host { |
| phy-supply = <&vcc5v0_host>; |
| status = "okay"; |
| }; |
| |
| &u2phy1 { |
| status = "okay"; |
| }; |
| |
| &u2phy1_host { |
| phy-supply = <&vcc5v0_host>; |
| status = "okay"; |
| }; |
| |
| &uart2 { |
| status = "okay"; |
| }; |
| |
| &usb_host0_ehci { |
| status = "okay"; |
| }; |
| |
| &usb_host0_ohci { |
| status = "okay"; |
| }; |
| |
| &usb_host1_ehci { |
| status = "okay"; |
| }; |
| |
| &usb_host1_ohci { |
| status = "okay"; |
| }; |
| |
| &pinctrl { |
| pmic { |
| pmic_int_l: pmic-int-l { |
| rockchip,pins = |
| <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; |
| }; |
| |
| pmic_dvs2: pmic-dvs2 { |
| rockchip,pins = |
| <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>; |
| }; |
| }; |
| |
| usb2 { |
| vcc5v0_host_en: vcc5v0-host-en { |
| rockchip,pins = |
| <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; |
| }; |
| }; |
| }; |
