| // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| /* |
| * Copyright (c) 2017 T-Chip Intelligent Technology Co., Ltd |
| * Copyright (c) 2019 Markus Reichl <m.reichl@fivetechno.de> |
| */ |
| |
| /dts-v1/; |
| #include "rk3399-roc-pc.dtsi" |
| |
| / { |
| model = "Firefly ROC-RK3399-PC Mezzanine Board"; |
| compatible = "firefly,roc-rk3399-pc-mezzanine", "rockchip,rk3399"; |
| |
| vcc3v3_ngff: vcc3v3-ngff { |
| compatible = "regulator-fixed"; |
| regulator-name = "vcc3v3_ngff"; |
| enable-active-high; |
| gpio = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&vcc3v3_ngff_en>; |
| regulator-always-on; |
| regulator-boot-on; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| vin-supply = <&dc_12v>; |
| }; |
| |
| vcc3v3_pcie: vcc3v3-pcie { |
| compatible = "regulator-fixed"; |
| regulator-name = "vcc3v3_pcie"; |
| enable-active-high; |
| gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&vcc3v3_pcie_en>; |
| regulator-always-on; |
| regulator-boot-on; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| vin-supply = <&dc_12v>; |
| }; |
| }; |
| |
| &pcie_phy { |
| status = "okay"; |
| }; |
| |
| &pcie0 { |
| ep-gpios = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>; |
| num-lanes = <4>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pcie_perst>; |
| vpcie3v3-supply = <&vcc3v3_pcie>; |
| status = "okay"; |
| }; |
| |
| &pinctrl { |
| ngff { |
| vcc3v3_ngff_en: vcc3v3-ngff-en { |
| rockchip,pins = <4 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; |
| }; |
| }; |
| |
| pcie { |
| vcc3v3_pcie_en: vcc3v3-pcie-en { |
| rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; |
| }; |
| |
| pcie_perst: pcie-perst { |
| rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; |
| }; |
| }; |
| }; |
