| # SPDX-License-Identifier: GPL-2.0+ |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/clock/allwinner,sun8i-a83t-de2-clk.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: Allwinner A83t Display Engine 2/3 Clock Controller |
| |
| maintainers: |
| - Chen-Yu Tsai <wens@csie.org> |
| - Maxime Ripard <mripard@kernel.org> |
| |
| properties: |
| "#clock-cells": |
| const: 1 |
| |
| "#reset-cells": |
| const: 1 |
| |
| compatible: |
| oneOf: |
| - const: allwinner,sun8i-a83t-de2-clk |
| - const: allwinner,sun8i-h3-de2-clk |
| - const: allwinner,sun8i-v3s-de2-clk |
| - const: allwinner,sun50i-a64-de2-clk |
| - const: allwinner,sun50i-h5-de2-clk |
| - const: allwinner,sun50i-h6-de3-clk |
| - items: |
| - const: allwinner,sun8i-r40-de2-clk |
| - const: allwinner,sun8i-h3-de2-clk |
| - items: |
| - const: allwinner,sun20i-d1-de2-clk |
| - const: allwinner,sun50i-h5-de2-clk |
| |
| reg: |
| maxItems: 1 |
| |
| clocks: |
| items: |
| - description: Bus Clock |
| - description: Module Clock |
| |
| clock-names: |
| items: |
| - const: bus |
| - const: mod |
| |
| resets: |
| maxItems: 1 |
| |
| required: |
| - "#clock-cells" |
| - "#reset-cells" |
| - compatible |
| - reg |
| - clocks |
| - clock-names |
| - resets |
| |
| additionalProperties: false |
| |
| examples: |
| - | |
| #include <dt-bindings/clock/sun8i-h3-ccu.h> |
| #include <dt-bindings/reset/sun8i-h3-ccu.h> |
| |
| de2_clocks: clock@1000000 { |
| compatible = "allwinner,sun8i-h3-de2-clk"; |
| reg = <0x01000000 0x100000>; |
| clocks = <&ccu CLK_BUS_DE>, |
| <&ccu CLK_DE>; |
| clock-names = "bus", |
| "mod"; |
| resets = <&ccu RST_BUS_DE>; |
| #clock-cells = <1>; |
| #reset-cells = <1>; |
| }; |
| |
| ... |
