blob: 2a862c83309e7011ffc9181da031a0b24a4a48f0 [file] [log] [blame]
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
#include "qru1000.dtsi"
#include "pm8150.dtsi"
/ {
model = "Qualcomm Technologies, Inc. QRU1000 IDP";
compatible = "qcom,qru1000-idp", "qcom,qru1000";
chassis-type = "embedded";
aliases {
serial0 = &uart7;
};
chosen {
stdout-path = "serial0:115200n8";
};
clocks {
xo_board: xo-board-clk {
compatible = "fixed-clock";
clock-frequency = <19200000>;
#clock-cells = <0>;
};
sleep_clk: sleep-clk {
compatible = "fixed-clock";
clock-frequency = <32000>;
#clock-cells = <0>;
};
};
ppvar_sys: ppvar-sys-regulator {
compatible = "regulator-fixed";
regulator-name = "ppvar_sys";
regulator-min-microvolt = <4200000>;
regulator-max-microvolt = <4200000>;
regulator-always-on;
regulator-boot-on;
};
vph_pwr: vph-pwr-regulator {
compatible = "regulator-fixed";
regulator-name = "vph_pwr";
regulator-min-microvolt = <3700000>;
regulator-max-microvolt = <3700000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&ppvar_sys>;
};
};
&apps_rsc {
regulators {
compatible = "qcom,pm8150-rpmh-regulators";
qcom,pmic-id = "a";
vdd-s1-supply = <&vph_pwr>;
vdd-s2-supply = <&vph_pwr>;
vdd-s3-supply = <&vph_pwr>;
vdd-s4-supply = <&vph_pwr>;
vdd-s5-supply = <&vph_pwr>;
vdd-s6-supply = <&vph_pwr>;
vdd-s7-supply = <&vph_pwr>;
vdd-s8-supply = <&vph_pwr>;
vdd-s9-supply = <&vph_pwr>;
vdd-s10-supply = <&vph_pwr>;
vdd-l1-l8-l11-supply = <&vreg_s6a_0p9>;
vdd-l2-l10-supply = <&vph_pwr>;
vdd-l3-l4-l5-l18-supply = <&vreg_s5a_2p0>;
vdd-l6-l9-supply = <&vreg_s6a_0p9>;
vdd-l7-l12-l14-l15-supply = <&vreg_s4a_1p8>;
vdd-l13-l16-l17-supply = <&vph_pwr>;
vreg_s2a_0p5: smps2 {
regulator-name = "vreg_s2a_0p5";
regulator-min-microvolt = <320000>;
regulator-max-microvolt = <570000>;
};
vreg_s3a_1p05: smps3 {
regulator-name = "vreg_s3a_1p05";
regulator-min-microvolt = <950000>;
regulator-max-microvolt = <1170000>;
};
vreg_s4a_1p8: smps4 {
regulator-name = "vreg_s4a_1p8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vreg_s5a_2p0: smps5 {
regulator-name = "vreg_s5a_2p0";
regulator-min-microvolt = <1904000>;
regulator-max-microvolt = <2000000>;
};
vreg_s6a_0p9: smps6 {
regulator-name = "vreg_s6a_0p9";
regulator-min-microvolt = <920000>;
regulator-max-microvolt = <1128000>;
};
vreg_s7a_1p2: smps7 {
regulator-name = "vreg_s7a_1p2";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
vreg_s8a_1p3: smps8 {
regulator-name = "vreg_s8a_1p3";
regulator-min-microvolt = <1352000>;
regulator-max-microvolt = <1352000>;
};
vreg_l1a_0p91: ldo1 {
regulator-name = "vreg_l1a_0p91";
regulator-min-microvolt = <312000>;
regulator-max-microvolt = <1304000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
};
vreg_l2a_2p3: ldo2 {
regulator-name = "vreg_l2a_2p3";
regulator-min-microvolt = <2970000>;
regulator-max-microvolt = <3300000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
};
vreg_l3a_1p2: ldo3 {
regulator-name = "vreg_l3a_1p2";
regulator-min-microvolt = <920000>;
regulator-max-microvolt = <1260000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
};
vreg_l5a_0p8: ldo5 {
regulator-name = "vreg_l5a_0p8";
regulator-min-microvolt = <312000>;
regulator-max-microvolt = <1304000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
};
vreg_l6a_0p91: ldo6 {
regulator-name = "vreg_l6a_0p91";
regulator-min-microvolt = <880000>;
regulator-max-microvolt = <950000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
};
vreg_l7a_1p8: ldo7 {
regulator-name = "vreg_l7a_1p8";
regulator-min-microvolt = <1650000>;
regulator-max-microvolt = <2000000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
};
vreg_l8a_0p91: ldo8 {
regulator-name = "vreg_l8a_0p91";
regulator-min-microvolt = <888000>;
regulator-max-microvolt = <925000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
};
vreg_l9a_0p91: ldo9 {
regulator-name = "vreg_l9a_0p91";
regulator-min-microvolt = <312000>;
regulator-max-microvolt = <1304000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
};
vreg_l10a_2p95: ldo10 {
regulator-name = "vreg_l10a_2p95";
regulator-min-microvolt = <2700000>;
regulator-max-microvolt = <3544000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
};
vreg_l11a_0p91: ldo11 {
regulator-name = "vreg_l11a_0p91";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1000000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
};
vreg_l12a_1p8: ldo12 {
regulator-name = "vreg_l12a_1p8";
regulator-min-microvolt = <1504000>;
regulator-max-microvolt = <1504000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
};
vreg_l14a_1p8: ldo14 {
regulator-name = "vreg_l14a_1p8";
regulator-min-microvolt = <1650000>;
regulator-max-microvolt = <1950000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
};
vreg_l15a_1p8: ldo15 {
regulator-name = "vreg_l15a_1p8";
regulator-min-microvolt = <1504000>;
regulator-max-microvolt = <2000000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
};
vreg_l16a_1p8: ldo16 {
regulator-name = "vreg_l16a_1p8";
regulator-min-microvolt = <1710000>;
regulator-max-microvolt = <1890000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
};
vreg_l17a_3p3: ldo17 {
regulator-name = "vreg_l17a_3p3";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3544000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
};
vreg_l18a_1p2: ldo18 {
regulator-name = "vreg_l18a_1p2";
regulator-min-microvolt = <312000>;
regulator-max-microvolt = <1304000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
};
&qup_i2c1_data_clk {
drive-strength = <2>;
bias-pull-up;
};
&qup_i2c2_data_clk {
drive-strength = <2>;
bias-pull-up;
};
&qup_i2c3_data_clk {
drive-strength = <2>;
bias-pull-up;
};
&qup_i2c4_data_clk {
drive-strength = <2>;
bias-pull-up;
};
&qup_i2c5_data_clk {
drive-strength = <2>;
bias-pull-up;
};
&qup_i2c6_data_clk {
drive-strength = <2>;
bias-pull-up;
};
&qup_i2c9_data_clk {
drive-strength = <2>;
bias-pull-up;
};
&qup_i2c10_data_clk {
drive-strength = <2>;
bias-pull-up;
};
&qup_i2c11_data_clk {
drive-strength = <2>;
bias-pull-up;
};
&qup_i2c12_data_clk {
drive-strength = <2>;
bias-pull-up;
};
&qup_i2c13_data_clk {
drive-strength = <2>;
bias-pull-up;
};
&qup_i2c14_data_clk {
drive-strength = <2>;
bias-pull-up;
};
&qup_i2c15_data_clk {
drive-strength = <2>;
bias-pull-up;
};
&qup_spi1_cs {
drive-strength = <6>;
bias-disable;
};
&qup_spi1_data_clk {
drive-strength = <6>;
bias-disable;
};
&qup_spi2_cs {
drive-strength = <6>;
bias-disable;
};
&qup_spi2_data_clk {
drive-strength = <6>;
bias-disable;
};
&qup_spi3_cs {
drive-strength = <6>;
bias-disable;
};
&qup_spi3_data_clk {
drive-strength = <6>;
bias-disable;
};
&qup_spi4_cs {
drive-strength = <6>;
bias-disable;
};
&qup_spi4_data_clk {
drive-strength = <6>;
bias-disable;
};
&qup_spi5_cs {
drive-strength = <6>;
bias-disable;
};
&qup_spi5_data_clk {
drive-strength = <6>;
bias-disable;
};
&qup_spi6_cs {
drive-strength = <6>;
bias-disable;
};
&qup_spi6_data_clk {
drive-strength = <6>;
bias-disable;
};
&qup_spi9_cs {
drive-strength = <6>;
bias-disable;
};
&qup_spi9_data_clk {
drive-strength = <6>;
bias-disable;
};
&qup_spi10_cs {
drive-strength = <6>;
bias-disable;
};
&qup_spi10_data_clk {
drive-strength = <6>;
bias-disable;
};
&qup_spi11_cs {
drive-strength = <6>;
bias-disable;
};
&qup_spi11_data_clk {
drive-strength = <6>;
bias-disable;
};
&qup_spi12_cs {
drive-strength = <6>;
bias-disable;
};
&qup_spi12_data_clk {
drive-strength = <6>;
bias-disable;
};
&qup_spi13_cs {
drive-strength = <6>;
bias-disable;
};
&qup_spi13_data_clk {
drive-strength = <6>;
bias-disable;
};
&qup_spi14_cs {
drive-strength = <6>;
bias-disable;
};
&qup_spi14_data_clk {
drive-strength = <6>;
bias-disable;
};
&qup_spi15_cs {
drive-strength = <6>;
bias-disable;
};
&qup_spi15_data_clk {
drive-strength = <6>;
bias-disable;
};
&qup_uart7_rx {
drive-strength = <2>;
bias-disable;
};
&qup_uart7_tx {
drive-strength = <2>;
bias-disable;
};
&qupv3_id_0 {
status = "okay";
};
&reserved_memory {
ecc_meta_data_mem: ecc-meta-data@f0000000 {
reg = <0x0 0xf0000000 0x0 0x10000000>;
no-map;
};
tenx_sp_mem: tenx-sp-buffer@800000000 {
reg = <0x8 0x0 0x0 0x80000000>;
no-map;
};
};
&tlmm {
gpio-reserved-ranges = <28 2>;
};
&uart7 {
status = "okay";
};