| # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/clock/cirrus,lochnagar.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: Cirrus Logic Lochnagar Audio Development Board |
| |
| maintainers: |
| - patches@opensource.cirrus.com |
| |
| description: | |
| Lochnagar is an evaluation and development board for Cirrus Logic |
| Smart CODEC and Amp devices. It allows the connection of most Cirrus |
| Logic devices on mini-cards, as well as allowing connection of various |
| application processor systems to provide a full evaluation platform. |
| Audio system topology, clocking and power can all be controlled through |
| the Lochnagar, allowing the device under test to be used in a variety of |
| possible use cases. |
| |
| This binding document describes the binding for the clock portion of the |
| driver. |
| |
| Also see these documents for generic binding information: |
| [1] Clock : ../clock/clock-bindings.txt |
| |
| And these for relevant defines: |
| [2] include/dt-bindings/clock/lochnagar.h |
| |
| This binding must be part of the Lochnagar MFD binding: |
| [3] ../mfd/cirrus,lochnagar.yaml |
| |
| properties: |
| compatible: |
| enum: |
| - cirrus,lochnagar1-clk |
| - cirrus,lochnagar2-clk |
| |
| '#clock-cells': |
| description: |
| The first cell indicates the clock number, see [2] for available |
| clocks and [1]. |
| const: 1 |
| |
| clock-names: |
| items: |
| enum: |
| - ln-cdc-clkout # Output clock from CODEC card. |
| - ln-dsp-clkout # Output clock from DSP card. |
| - ln-gf-mclk1 # Optional input clock from host system. |
| - ln-gf-mclk2 # Optional input clock from host system. |
| - ln-gf-mclk3 # Optional input clock from host system. |
| - ln-gf-mclk4 # Optional input clock from host system. |
| - ln-psia1-mclk # Optional input clock from external connector. |
| - ln-psia2-mclk # Optional input clock from external connector. |
| - ln-spdif-mclk # Optional input clock from SPDIF. |
| - ln-spdif-clkout # Optional input clock from SPDIF. |
| - ln-adat-mclk # Optional input clock from ADAT. |
| - ln-pmic-32k # On board fixed clock. |
| - ln-clk-12m # On board fixed clock. |
| - ln-clk-11m # On board fixed clock. |
| - ln-clk-24m # On board fixed clock. |
| - ln-clk-22m # On board fixed clock. |
| - ln-clk-8m # On board fixed clock. |
| - ln-usb-clk-24m # On board fixed clock. |
| - ln-usb-clk-12m # On board fixed clock. |
| minItems: 1 |
| maxItems: 19 |
| |
| clocks: true |
| assigned-clocks: true |
| assigned-clock-parents: true |
| |
| additionalProperties: false |
| |
| required: |
| - compatible |
| - '#clock-cells' |