| Mediatek DPI Device |
| =================== |
| |
| The Mediatek DPI function block is a sink of the display subsystem and |
| provides 8-bit RGB/YUV444 or 8/10/10-bit YUV422 pixel data on a parallel |
| output bus. |
| |
| Required properties: |
| - compatible: "mediatek,<chip>-dpi" |
| the supported chips are mt2701 , mt8173 and mt8183. |
| - reg: Physical base address and length of the controller's registers |
| - interrupts: The interrupt signal from the function block. |
| - clocks: device clocks |
| See Documentation/devicetree/bindings/clock/clock-bindings.txt for details. |
| - clock-names: must contain "pixel", "engine", and "pll" |
| - port: Output port node with endpoint definitions as described in |
| Documentation/devicetree/bindings/graph.txt. This port should be connected |
| to the input port of an attached HDMI or LVDS encoder chip. |
| |
| Example: |
| |
| dpi0: dpi@1401d000 { |
| compatible = "mediatek,mt8173-dpi"; |
| reg = <0 0x1401d000 0 0x1000>; |
| interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_LOW>; |
| clocks = <&mmsys CLK_MM_DPI_PIXEL>, |
| <&mmsys CLK_MM_DPI_ENGINE>, |
| <&apmixedsys CLK_APMIXED_TVDPLL>; |
| clock-names = "pixel", "engine", "pll"; |
| |
| port { |
| dpi0_out: endpoint { |
| remote-endpoint = <&hdmi0_in>; |
| }; |
| }; |
| }; |