blob: d4ea4a2c0b9bbeefeff8e1d1fe07cb87759604d8 [file] [log] [blame]
// SPDX-License-Identifier: GPL-2.0 OR MIT
/*
* Copyright (C) 2022 StarFive Technology Co., Ltd.
* Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk>
*/
/dts-v1/;
#include "jh7110-starfive-visionfive-2.dtsi"
/ {
model = "StarFive VisionFive 2 v1.3B";
compatible = "starfive,visionfive-2-v1.3b", "starfive,jh7110";
};
&gmac0 {
starfive,tx-use-rgmii-clk;
assigned-clocks = <&aoncrg JH7110_AONCLK_GMAC0_TX>;
assigned-clock-parents = <&aoncrg JH7110_AONCLK_GMAC0_RMII_RTX>;
};
&gmac1 {
starfive,tx-use-rgmii-clk;
assigned-clocks = <&syscrg JH7110_SYSCLK_GMAC1_TX>;
assigned-clock-parents = <&syscrg JH7110_SYSCLK_GMAC1_RMII_RTX>;
};
&phy0 {
motorcomm,tx-clk-adj-enabled;
motorcomm,tx-clk-100-inverted;
motorcomm,tx-clk-1000-inverted;
motorcomm,rx-clk-drv-microamp = <3970>;
motorcomm,rx-data-drv-microamp = <2910>;
rx-internal-delay-ps = <1500>;
tx-internal-delay-ps = <1500>;
};
&phy1 {
motorcomm,tx-clk-adj-enabled;
motorcomm,tx-clk-100-inverted;
motorcomm,rx-clk-drv-microamp = <3970>;
motorcomm,rx-data-drv-microamp = <2910>;
rx-internal-delay-ps = <300>;
tx-internal-delay-ps = <0>;
};