| /* SPDX-License-Identifier: MIT */ |
| /* |
| * Copyright © 2023 Intel Corporation |
| */ |
| |
| #ifndef __INTEL_TV_REGS_H__ |
| #define __INTEL_TV_REGS_H__ |
| |
| #include "intel_display_reg_defs.h" |
| |
| /* TV port control */ |
| #define TV_CTL _MMIO(0x68000) |
| /* Enables the TV encoder */ |
| # define TV_ENC_ENABLE (1 << 31) |
| /* Sources the TV encoder input from pipe B instead of A. */ |
| # define TV_ENC_PIPE_SEL_SHIFT 30 |
| # define TV_ENC_PIPE_SEL_MASK (1 << 30) |
| # define TV_ENC_PIPE_SEL(pipe) ((pipe) << 30) |
| /* Outputs composite video (DAC A only) */ |
| # define TV_ENC_OUTPUT_COMPOSITE (0 << 28) |
| /* Outputs SVideo video (DAC B/C) */ |
| # define TV_ENC_OUTPUT_SVIDEO (1 << 28) |
| /* Outputs Component video (DAC A/B/C) */ |
| # define TV_ENC_OUTPUT_COMPONENT (2 << 28) |
| /* Outputs Composite and SVideo (DAC A/B/C) */ |
| # define TV_ENC_OUTPUT_SVIDEO_COMPOSITE (3 << 28) |
| # define TV_TRILEVEL_SYNC (1 << 21) |
| /* Enables slow sync generation (945GM only) */ |
| # define TV_SLOW_SYNC (1 << 20) |
| /* Selects 4x oversampling for 480i and 576p */ |
| # define TV_OVERSAMPLE_4X (0 << 18) |
| /* Selects 2x oversampling for 720p and 1080i */ |
| # define TV_OVERSAMPLE_2X (1 << 18) |
| /* Selects no oversampling for 1080p */ |
| # define TV_OVERSAMPLE_NONE (2 << 18) |
| /* Selects 8x oversampling */ |
| # define TV_OVERSAMPLE_8X (3 << 18) |
| # define TV_OVERSAMPLE_MASK (3 << 18) |
| /* Selects progressive mode rather than interlaced */ |
| # define TV_PROGRESSIVE (1 << 17) |
| /* Sets the colorburst to PAL mode. Required for non-M PAL modes. */ |
| # define TV_PAL_BURST (1 << 16) |
| /* Field for setting delay of Y compared to C */ |
| # define TV_YC_SKEW_MASK (7 << 12) |
| /* Enables a fix for 480p/576p standard definition modes on the 915GM only */ |
| # define TV_ENC_SDP_FIX (1 << 11) |
| /* |
| * Enables a fix for the 915GM only. |
| * |
| * Not sure what it does. |
| */ |
| # define TV_ENC_C0_FIX (1 << 10) |
| /* Bits that must be preserved by software */ |
| # define TV_CTL_SAVE ((1 << 11) | (3 << 9) | (7 << 6) | 0xf) |
| # define TV_FUSE_STATE_MASK (3 << 4) |
| /* Read-only state that reports all features enabled */ |
| # define TV_FUSE_STATE_ENABLED (0 << 4) |
| /* Read-only state that reports that Macrovision is disabled in hardware*/ |
| # define TV_FUSE_STATE_NO_MACROVISION (1 << 4) |
| /* Read-only state that reports that TV-out is disabled in hardware. */ |
| # define TV_FUSE_STATE_DISABLED (2 << 4) |
| /* Normal operation */ |
| # define TV_TEST_MODE_NORMAL (0 << 0) |
| /* Encoder test pattern 1 - combo pattern */ |
| # define TV_TEST_MODE_PATTERN_1 (1 << 0) |
| /* Encoder test pattern 2 - full screen vertical 75% color bars */ |
| # define TV_TEST_MODE_PATTERN_2 (2 << 0) |
| /* Encoder test pattern 3 - full screen horizontal 75% color bars */ |
| # define TV_TEST_MODE_PATTERN_3 (3 << 0) |
| /* Encoder test pattern 4 - random noise */ |
| # define TV_TEST_MODE_PATTERN_4 (4 << 0) |
| /* Encoder test pattern 5 - linear color ramps */ |
| # define TV_TEST_MODE_PATTERN_5 (5 << 0) |
| /* |
| * This test mode forces the DACs to 50% of full output. |
| * |
| * This is used for load detection in combination with TVDAC_SENSE_MASK |
| */ |
| # define TV_TEST_MODE_MONITOR_DETECT (7 << 0) |
| # define TV_TEST_MODE_MASK (7 << 0) |
| |
| #define TV_DAC _MMIO(0x68004) |
| # define TV_DAC_SAVE 0x00ffff00 |
| /* |
| * Reports that DAC state change logic has reported change (RO). |
| * |
| * This gets cleared when TV_DAC_STATE_EN is cleared |
| */ |
| # define TVDAC_STATE_CHG (1 << 31) |
| # define TVDAC_SENSE_MASK (7 << 28) |
| /* Reports that DAC A voltage is above the detect threshold */ |
| # define TVDAC_A_SENSE (1 << 30) |
| /* Reports that DAC B voltage is above the detect threshold */ |
| # define TVDAC_B_SENSE (1 << 29) |
| /* Reports that DAC C voltage is above the detect threshold */ |
| # define TVDAC_C_SENSE (1 << 28) |
| /* |
| * Enables DAC state detection logic, for load-based TV detection. |
| * |
| * The PLL of the chosen pipe (in TV_CTL) must be running, and the encoder set |
| * to off, for load detection to work. |
| */ |
| # define TVDAC_STATE_CHG_EN (1 << 27) |
| /* Sets the DAC A sense value to high */ |
| # define TVDAC_A_SENSE_CTL (1 << 26) |
| /* Sets the DAC B sense value to high */ |
| # define TVDAC_B_SENSE_CTL (1 << 25) |
| /* Sets the DAC C sense value to high */ |
| # define TVDAC_C_SENSE_CTL (1 << 24) |
| /* Overrides the ENC_ENABLE and DAC voltage levels */ |
| # define DAC_CTL_OVERRIDE (1 << 7) |
| /* Sets the slew rate. Must be preserved in software */ |
| # define ENC_TVDAC_SLEW_FAST (1 << 6) |
| # define DAC_A_1_3_V (0 << 4) |
| # define DAC_A_1_1_V (1 << 4) |
| # define DAC_A_0_7_V (2 << 4) |
| # define DAC_A_MASK (3 << 4) |
| # define DAC_B_1_3_V (0 << 2) |
| # define DAC_B_1_1_V (1 << 2) |
| # define DAC_B_0_7_V (2 << 2) |
| # define DAC_B_MASK (3 << 2) |
| # define DAC_C_1_3_V (0 << 0) |
| # define DAC_C_1_1_V (1 << 0) |
| # define DAC_C_0_7_V (2 << 0) |
| # define DAC_C_MASK (3 << 0) |
| |
| /* |
| * CSC coefficients are stored in a floating point format with 9 bits of |
| * mantissa and 2 or 3 bits of exponent. The exponent is represented as 2**-n, |
| * where 2-bit exponents are unsigned n, and 3-bit exponents are signed n with |
| * -1 (0x3) being the only legal negative value. |
| */ |
| #define TV_CSC_Y _MMIO(0x68010) |
| # define TV_RY_MASK 0x07ff0000 |
| # define TV_RY_SHIFT 16 |
| # define TV_GY_MASK 0x00000fff |
| # define TV_GY_SHIFT 0 |
| |
| #define TV_CSC_Y2 _MMIO(0x68014) |
| # define TV_BY_MASK 0x07ff0000 |
| # define TV_BY_SHIFT 16 |
| /* |
| * Y attenuation for component video. |
| * |
| * Stored in 1.9 fixed point. |
| */ |
| # define TV_AY_MASK 0x000003ff |
| # define TV_AY_SHIFT 0 |
| |
| #define TV_CSC_U _MMIO(0x68018) |
| # define TV_RU_MASK 0x07ff0000 |
| # define TV_RU_SHIFT 16 |
| # define TV_GU_MASK 0x000007ff |
| # define TV_GU_SHIFT 0 |
| |
| #define TV_CSC_U2 _MMIO(0x6801c) |
| # define TV_BU_MASK 0x07ff0000 |
| # define TV_BU_SHIFT 16 |
| /* |
| * U attenuation for component video. |
| * |
| * Stored in 1.9 fixed point. |
| */ |
| # define TV_AU_MASK 0x000003ff |
| # define TV_AU_SHIFT 0 |
| |
| #define TV_CSC_V _MMIO(0x68020) |
| # define TV_RV_MASK 0x0fff0000 |
| # define TV_RV_SHIFT 16 |
| # define TV_GV_MASK 0x000007ff |
| # define TV_GV_SHIFT 0 |
| |
| #define TV_CSC_V2 _MMIO(0x68024) |
| # define TV_BV_MASK 0x07ff0000 |
| # define TV_BV_SHIFT 16 |
| /* |
| * V attenuation for component video. |
| * |
| * Stored in 1.9 fixed point. |
| */ |
| # define TV_AV_MASK 0x000007ff |
| # define TV_AV_SHIFT 0 |
| |
| #define TV_CLR_KNOBS _MMIO(0x68028) |
| /* 2s-complement brightness adjustment */ |
| # define TV_BRIGHTNESS_MASK 0xff000000 |
| # define TV_BRIGHTNESS_SHIFT 24 |
| /* Contrast adjustment, as a 2.6 unsigned floating point number */ |
| # define TV_CONTRAST_MASK 0x00ff0000 |
| # define TV_CONTRAST_SHIFT 16 |
| /* Saturation adjustment, as a 2.6 unsigned floating point number */ |
| # define TV_SATURATION_MASK 0x0000ff00 |
| # define TV_SATURATION_SHIFT 8 |
| /* Hue adjustment, as an integer phase angle in degrees */ |
| # define TV_HUE_MASK 0x000000ff |
| # define TV_HUE_SHIFT 0 |
| |
| #define TV_CLR_LEVEL _MMIO(0x6802c) |
| /* Controls the DAC level for black */ |
| # define TV_BLACK_LEVEL_MASK 0x01ff0000 |
| # define TV_BLACK_LEVEL_SHIFT 16 |
| /* Controls the DAC level for blanking */ |
| # define TV_BLANK_LEVEL_MASK 0x000001ff |
| # define TV_BLANK_LEVEL_SHIFT 0 |
| |
| #define TV_H_CTL_1 _MMIO(0x68030) |
| /* Number of pixels in the hsync. */ |
| # define TV_HSYNC_END_MASK 0x1fff0000 |
| # define TV_HSYNC_END_SHIFT 16 |
| /* Total number of pixels minus one in the line (display and blanking). */ |
| # define TV_HTOTAL_MASK 0x00001fff |
| # define TV_HTOTAL_SHIFT 0 |
| |
| #define TV_H_CTL_2 _MMIO(0x68034) |
| /* Enables the colorburst (needed for non-component color) */ |
| # define TV_BURST_ENA (1 << 31) |
| /* Offset of the colorburst from the start of hsync, in pixels minus one. */ |
| # define TV_HBURST_START_SHIFT 16 |
| # define TV_HBURST_START_MASK 0x1fff0000 |
| /* Length of the colorburst */ |
| # define TV_HBURST_LEN_SHIFT 0 |
| # define TV_HBURST_LEN_MASK 0x0001fff |
| |
| #define TV_H_CTL_3 _MMIO(0x68038) |
| /* End of hblank, measured in pixels minus one from start of hsync */ |
| # define TV_HBLANK_END_SHIFT 16 |
| # define TV_HBLANK_END_MASK 0x1fff0000 |
| /* Start of hblank, measured in pixels minus one from start of hsync */ |
| # define TV_HBLANK_START_SHIFT 0 |
| # define TV_HBLANK_START_MASK 0x0001fff |
| |
| #define TV_V_CTL_1 _MMIO(0x6803c) |
| /* XXX */ |
| # define TV_NBR_END_SHIFT 16 |
| # define TV_NBR_END_MASK 0x07ff0000 |
| /* XXX */ |
| # define TV_VI_END_F1_SHIFT 8 |
| # define TV_VI_END_F1_MASK 0x00003f00 |
| /* XXX */ |
| # define TV_VI_END_F2_SHIFT 0 |
| # define TV_VI_END_F2_MASK 0x0000003f |
| |
| #define TV_V_CTL_2 _MMIO(0x68040) |
| /* Length of vsync, in half lines */ |
| # define TV_VSYNC_LEN_MASK 0x07ff0000 |
| # define TV_VSYNC_LEN_SHIFT 16 |
| /* Offset of the start of vsync in field 1, measured in one less than the |
| * number of half lines. |
| */ |
| # define TV_VSYNC_START_F1_MASK 0x00007f00 |
| # define TV_VSYNC_START_F1_SHIFT 8 |
| /* |
| * Offset of the start of vsync in field 2, measured in one less than the |
| * number of half lines. |
| */ |
| # define TV_VSYNC_START_F2_MASK 0x0000007f |
| # define TV_VSYNC_START_F2_SHIFT 0 |
| |
| #define TV_V_CTL_3 _MMIO(0x68044) |
| /* Enables generation of the equalization signal */ |
| # define TV_EQUAL_ENA (1 << 31) |
| /* Length of vsync, in half lines */ |
| # define TV_VEQ_LEN_MASK 0x007f0000 |
| # define TV_VEQ_LEN_SHIFT 16 |
| /* Offset of the start of equalization in field 1, measured in one less than |
| * the number of half lines. |
| */ |
| # define TV_VEQ_START_F1_MASK 0x0007f00 |
| # define TV_VEQ_START_F1_SHIFT 8 |
| /* |
| * Offset of the start of equalization in field 2, measured in one less than |
| * the number of half lines. |
| */ |
| # define TV_VEQ_START_F2_MASK 0x000007f |
| # define TV_VEQ_START_F2_SHIFT 0 |
| |
| #define TV_V_CTL_4 _MMIO(0x68048) |
| /* |
| * Offset to start of vertical colorburst, measured in one less than the |
| * number of lines from vertical start. |
| */ |
| # define TV_VBURST_START_F1_MASK 0x003f0000 |
| # define TV_VBURST_START_F1_SHIFT 16 |
| /* |
| * Offset to the end of vertical colorburst, measured in one less than the |
| * number of lines from the start of NBR. |
| */ |
| # define TV_VBURST_END_F1_MASK 0x000000ff |
| # define TV_VBURST_END_F1_SHIFT 0 |
| |
| #define TV_V_CTL_5 _MMIO(0x6804c) |
| /* |
| * Offset to start of vertical colorburst, measured in one less than the |
| * number of lines from vertical start. |
| */ |
| # define TV_VBURST_START_F2_MASK 0x003f0000 |
| # define TV_VBURST_START_F2_SHIFT 16 |
| /* |
| * Offset to the end of vertical colorburst, measured in one less than the |
| * number of lines from the start of NBR. |
| */ |
| # define TV_VBURST_END_F2_MASK 0x000000ff |
| # define TV_VBURST_END_F2_SHIFT 0 |
| |
| #define TV_V_CTL_6 _MMIO(0x68050) |
| /* |
| * Offset to start of vertical colorburst, measured in one less than the |
| * number of lines from vertical start. |
| */ |
| # define TV_VBURST_START_F3_MASK 0x003f0000 |
| # define TV_VBURST_START_F3_SHIFT 16 |
| /* |
| * Offset to the end of vertical colorburst, measured in one less than the |
| * number of lines from the start of NBR. |
| */ |
| # define TV_VBURST_END_F3_MASK 0x000000ff |
| # define TV_VBURST_END_F3_SHIFT 0 |
| |
| #define TV_V_CTL_7 _MMIO(0x68054) |
| /* |
| * Offset to start of vertical colorburst, measured in one less than the |
| * number of lines from vertical start. |
| */ |
| # define TV_VBURST_START_F4_MASK 0x003f0000 |
| # define TV_VBURST_START_F4_SHIFT 16 |
| /* |
| * Offset to the end of vertical colorburst, measured in one less than the |
| * number of lines from the start of NBR. |
| */ |
| # define TV_VBURST_END_F4_MASK 0x000000ff |
| # define TV_VBURST_END_F4_SHIFT 0 |
| |
| #define TV_SC_CTL_1 _MMIO(0x68060) |
| /* Turns on the first subcarrier phase generation DDA */ |
| # define TV_SC_DDA1_EN (1 << 31) |
| /* Turns on the first subcarrier phase generation DDA */ |
| # define TV_SC_DDA2_EN (1 << 30) |
| /* Turns on the first subcarrier phase generation DDA */ |
| # define TV_SC_DDA3_EN (1 << 29) |
| /* Sets the subcarrier DDA to reset frequency every other field */ |
| # define TV_SC_RESET_EVERY_2 (0 << 24) |
| /* Sets the subcarrier DDA to reset frequency every fourth field */ |
| # define TV_SC_RESET_EVERY_4 (1 << 24) |
| /* Sets the subcarrier DDA to reset frequency every eighth field */ |
| # define TV_SC_RESET_EVERY_8 (2 << 24) |
| /* Sets the subcarrier DDA to never reset the frequency */ |
| # define TV_SC_RESET_NEVER (3 << 24) |
| /* Sets the peak amplitude of the colorburst.*/ |
| # define TV_BURST_LEVEL_MASK 0x00ff0000 |
| # define TV_BURST_LEVEL_SHIFT 16 |
| /* Sets the increment of the first subcarrier phase generation DDA */ |
| # define TV_SCDDA1_INC_MASK 0x00000fff |
| # define TV_SCDDA1_INC_SHIFT 0 |
| |
| #define TV_SC_CTL_2 _MMIO(0x68064) |
| /* Sets the rollover for the second subcarrier phase generation DDA */ |
| # define TV_SCDDA2_SIZE_MASK 0x7fff0000 |
| # define TV_SCDDA2_SIZE_SHIFT 16 |
| /* Sets the increent of the second subcarrier phase generation DDA */ |
| # define TV_SCDDA2_INC_MASK 0x00007fff |
| # define TV_SCDDA2_INC_SHIFT 0 |
| |
| #define TV_SC_CTL_3 _MMIO(0x68068) |
| /* Sets the rollover for the third subcarrier phase generation DDA */ |
| # define TV_SCDDA3_SIZE_MASK 0x7fff0000 |
| # define TV_SCDDA3_SIZE_SHIFT 16 |
| /* Sets the increent of the third subcarrier phase generation DDA */ |
| # define TV_SCDDA3_INC_MASK 0x00007fff |
| # define TV_SCDDA3_INC_SHIFT 0 |
| |
| #define TV_WIN_POS _MMIO(0x68070) |
| /* X coordinate of the display from the start of horizontal active */ |
| # define TV_XPOS_MASK 0x1fff0000 |
| # define TV_XPOS_SHIFT 16 |
| /* Y coordinate of the display from the start of vertical active (NBR) */ |
| # define TV_YPOS_MASK 0x00000fff |
| # define TV_YPOS_SHIFT 0 |
| |
| #define TV_WIN_SIZE _MMIO(0x68074) |
| /* Horizontal size of the display window, measured in pixels*/ |
| # define TV_XSIZE_MASK 0x1fff0000 |
| # define TV_XSIZE_SHIFT 16 |
| /* |
| * Vertical size of the display window, measured in pixels. |
| * |
| * Must be even for interlaced modes. |
| */ |
| # define TV_YSIZE_MASK 0x00000fff |
| # define TV_YSIZE_SHIFT 0 |
| |
| #define TV_FILTER_CTL_1 _MMIO(0x68080) |
| /* |
| * Enables automatic scaling calculation. |
| * |
| * If set, the rest of the registers are ignored, and the calculated values can |
| * be read back from the register. |
| */ |
| # define TV_AUTO_SCALE (1 << 31) |
| /* |
| * Disables the vertical filter. |
| * |
| * This is required on modes more than 1024 pixels wide */ |
| # define TV_V_FILTER_BYPASS (1 << 29) |
| /* Enables adaptive vertical filtering */ |
| # define TV_VADAPT (1 << 28) |
| # define TV_VADAPT_MODE_MASK (3 << 26) |
| /* Selects the least adaptive vertical filtering mode */ |
| # define TV_VADAPT_MODE_LEAST (0 << 26) |
| /* Selects the moderately adaptive vertical filtering mode */ |
| # define TV_VADAPT_MODE_MODERATE (1 << 26) |
| /* Selects the most adaptive vertical filtering mode */ |
| # define TV_VADAPT_MODE_MOST (3 << 26) |
| /* |
| * Sets the horizontal scaling factor. |
| * |
| * This should be the fractional part of the horizontal scaling factor divided |
| * by the oversampling rate. TV_HSCALE should be less than 1, and set to: |
| * |
| * (src width - 1) / ((oversample * dest width) - 1) |
| */ |
| # define TV_HSCALE_FRAC_MASK 0x00003fff |
| # define TV_HSCALE_FRAC_SHIFT 0 |
| |
| #define TV_FILTER_CTL_2 _MMIO(0x68084) |
| /* |
| * Sets the integer part of the 3.15 fixed-point vertical scaling factor. |
| * |
| * TV_VSCALE should be (src height - 1) / ((interlace * dest height) - 1) |
| */ |
| # define TV_VSCALE_INT_MASK 0x00038000 |
| # define TV_VSCALE_INT_SHIFT 15 |
| /* |
| * Sets the fractional part of the 3.15 fixed-point vertical scaling factor. |
| * |
| * \sa TV_VSCALE_INT_MASK |
| */ |
| # define TV_VSCALE_FRAC_MASK 0x00007fff |
| # define TV_VSCALE_FRAC_SHIFT 0 |
| |
| #define TV_FILTER_CTL_3 _MMIO(0x68088) |
| /* |
| * Sets the integer part of the 3.15 fixed-point vertical scaling factor. |
| * |
| * TV_VSCALE should be (src height - 1) / (1/4 * (dest height - 1)) |
| * |
| * For progressive modes, TV_VSCALE_IP_INT should be set to zeroes. |
| */ |
| # define TV_VSCALE_IP_INT_MASK 0x00038000 |
| # define TV_VSCALE_IP_INT_SHIFT 15 |
| /* |
| * Sets the fractional part of the 3.15 fixed-point vertical scaling factor. |
| * |
| * For progressive modes, TV_VSCALE_IP_INT should be set to zeroes. |
| * |
| * \sa TV_VSCALE_IP_INT_MASK |
| */ |
| # define TV_VSCALE_IP_FRAC_MASK 0x00007fff |
| # define TV_VSCALE_IP_FRAC_SHIFT 0 |
| |
| #define TV_CC_CONTROL _MMIO(0x68090) |
| # define TV_CC_ENABLE (1 << 31) |
| /* |
| * Specifies which field to send the CC data in. |
| * |
| * CC data is usually sent in field 0. |
| */ |
| # define TV_CC_FID_MASK (1 << 27) |
| # define TV_CC_FID_SHIFT 27 |
| /* Sets the horizontal position of the CC data. Usually 135. */ |
| # define TV_CC_HOFF_MASK 0x03ff0000 |
| # define TV_CC_HOFF_SHIFT 16 |
| /* Sets the vertical position of the CC data. Usually 21 */ |
| # define TV_CC_LINE_MASK 0x0000003f |
| # define TV_CC_LINE_SHIFT 0 |
| |
| #define TV_CC_DATA _MMIO(0x68094) |
| # define TV_CC_RDY (1 << 31) |
| /* Second word of CC data to be transmitted. */ |
| # define TV_CC_DATA_2_MASK 0x007f0000 |
| # define TV_CC_DATA_2_SHIFT 16 |
| /* First word of CC data to be transmitted. */ |
| # define TV_CC_DATA_1_MASK 0x0000007f |
| # define TV_CC_DATA_1_SHIFT 0 |
| |
| #define TV_H_LUMA(i) _MMIO(0x68100 + (i) * 4) /* 60 registers */ |
| #define TV_H_CHROMA(i) _MMIO(0x68200 + (i) * 4) /* 60 registers */ |
| #define TV_V_LUMA(i) _MMIO(0x68300 + (i) * 4) /* 43 registers */ |
| #define TV_V_CHROMA(i) _MMIO(0x68400 + (i) * 4) /* 43 registers */ |
| |
| #endif /* __INTEL_TV_REGS_H__ */ |
