| Binding for Texas Instruments ADPLL clock. |
| |
| Binding status: Unstable - ABI compatibility may be broken in the future |
| |
| This binding uses the common clock binding[1]. It assumes a |
| register-mapped ADPLL with two to three selectable input clocks |
| and three to four children. |
| |
| [1] Documentation/devicetree/bindings/clock/clock-bindings.txt |
| |
| Required properties: |
| - compatible : shall be one of "ti,dm814-adpll-s-clock" or |
| "ti,dm814-adpll-lj-clock" depending on the type of the ADPLL |
| - #clock-cells : from common clock binding; shall be set to 1. |
| - clocks : link phandles of parent clocks clkinp and clkinpulow, note |
| that the adpll-s-clock also has an optional clkinphif |
| - reg : address and length of the register set for controlling the ADPLL. |
| |
| Examples: |
| adpll_mpu_ck: adpll@40 { |
| #clock-cells = <1>; |
| compatible = "ti,dm814-adpll-s-clock"; |
| reg = <0x40 0x40>; |
| clocks = <&devosc_ck &devosc_ck &devosc_ck>; |
| clock-names = "clkinp", "clkinpulow", "clkinphif"; |
| clock-output-names = "481c5040.adpll.dcoclkldo", |
| "481c5040.adpll.clkout", |
| "481c5040.adpll.clkoutx2", |
| "481c5040.adpll.clkouthif"; |
| }; |
| |
| adpll_dsp_ck: adpll@80 { |
| #clock-cells = <1>; |
| compatible = "ti,dm814-adpll-lj-clock"; |
| reg = <0x80 0x30>; |
| clocks = <&devosc_ck &devosc_ck>; |
| clock-names = "clkinp", "clkinpulow"; |
| clock-output-names = "481c5080.adpll.dcoclkldo", |
| "481c5080.adpll.clkout", |
| "481c5080.adpll.clkoutldo"; |
| }; |