| /* SPDX-License-Identifier: GPL-2.0 */ |
| /* |
| * Copyright (c) 2017, The Linux Foundation. All rights reserved. |
| */ |
| |
| #ifndef QCOM_PHY_QMP_PCS_UFS_V2_H_ |
| #define QCOM_PHY_QMP_PCS_UFS_V2_H_ |
| |
| #define QPHY_V2_PCS_UFS_PHY_START 0x000 |
| #define QPHY_V2_PCS_UFS_POWER_DOWN_CONTROL 0x004 |
| |
| #define QPHY_V2_PCS_UFS_TX_LARGE_AMP_DRV_LVL 0x034 |
| #define QPHY_V2_PCS_UFS_TX_LARGE_AMP_POST_EMP_LVL 0x038 |
| #define QPHY_V2_PCS_UFS_TX_SMALL_AMP_DRV_LVL 0x03c |
| #define QPHY_V2_PCS_UFS_TX_SMALL_AMP_POST_EMP_LVL 0x040 |
| |
| #define QPHY_V2_PCS_UFS_RX_MIN_STALL_NOCONFIG_TIME_CAP 0x0cc |
| #define QPHY_V2_PCS_UFS_RX_SYM_RESYNC_CTRL 0x13c |
| #define QPHY_V2_PCS_UFS_RX_MIN_HIBERN8_TIME 0x140 |
| #define QPHY_V2_PCS_UFS_RX_SIGDET_CTRL2 0x148 |
| #define QPHY_V2_PCS_UFS_RX_PWM_GEAR_BAND 0x154 |
| |
| #define QPHY_V2_PCS_UFS_READY_STATUS 0x168 |
| |
| #endif |
