| // SPDX-License-Identifier: BSD-3-Clause |
| /* |
| * Common device tree for components shared between the BCM21664 and BCM23550 |
| * SoCs. |
| * |
| * Copyright (C) 2016 Broadcom |
| */ |
| |
| /dts-v1/; |
| |
| #include <dt-bindings/clock/bcm21664.h> |
| #include <dt-bindings/interrupt-controller/arm-gic.h> |
| #include <dt-bindings/interrupt-controller/irq.h> |
| |
| / { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| |
| /* Hub bus */ |
| hub: hub-bus@34000000 { |
| compatible = "simple-bus"; |
| ranges = <0 0x34000000 0x102f83ac>; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| |
| smc: smc@4e000 { |
| /* Compatible filled by SoC DTSI */ |
| reg = <0x0004e000 0x400>; /* 1 KiB in SRAM */ |
| }; |
| |
| resetmgr: reset-controller@1001f00 { |
| compatible = "brcm,bcm21664-resetmgr"; |
| reg = <0x01001f00 0x24>; |
| }; |
| |
| gpio: gpio@1003000 { |
| /* Compatible filled by SoC DTSI */ |
| reg = <0x01003000 0x524>; |
| interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, |
| <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, |
| <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, |
| <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; |
| #gpio-cells = <2>; |
| #interrupt-cells = <2>; |
| gpio-controller; |
| interrupt-controller; |
| }; |
| |
| timer@1006000 { |
| compatible = "brcm,kona-timer"; |
| reg = <0x01006000 0x1c>; |
| interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; |
| clocks = <&aon_ccu BCM21664_AON_CCU_HUB_TIMER>; |
| }; |
| }; |
| |
| /* Slaves bus */ |
| slaves: slaves-bus@3e000000 { |
| compatible = "simple-bus"; |
| ranges = <0 0x3e000000 0x0001c070>; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| |
| uartb: serial@0 { |
| compatible = "snps,dw-apb-uart"; |
| reg = <0x00000000 0x118>; |
| clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB>; |
| interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; |
| reg-shift = <2>; |
| reg-io-width = <4>; |
| status = "disabled"; |
| }; |
| |
| uartb2: serial@1000 { |
| compatible = "snps,dw-apb-uart"; |
| reg = <0x00001000 0x118>; |
| clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB2>; |
| interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; |
| reg-shift = <2>; |
| reg-io-width = <4>; |
| status = "disabled"; |
| }; |
| |
| uartb3: serial@2000 { |
| compatible = "snps,dw-apb-uart"; |
| reg = <0x00002000 0x118>; |
| clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB3>; |
| interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; |
| reg-shift = <2>; |
| reg-io-width = <4>; |
| status = "disabled"; |
| }; |
| |
| bsc1: i2c@16000 { |
| /* Compatible filled by SoC DTSI */ |
| reg = <0x00016000 0x70>; |
| interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC1>; |
| status = "disabled"; |
| }; |
| |
| bsc2: i2c@17000 { |
| /* Compatible filled by SoC DTSI */ |
| reg = <0x00017000 0x70>; |
| interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC2>; |
| status = "disabled"; |
| }; |
| |
| bsc3: i2c@18000 { |
| /* Compatible filled by SoC DTSI */ |
| reg = <0x00018000 0x70>; |
| interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC3>; |
| status = "disabled"; |
| }; |
| |
| bsc4: i2c@1c000 { |
| /* Compatible filled by SoC DTSI */ |
| reg = <0x0001c000 0x70>; |
| interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC4>; |
| status = "disabled"; |
| }; |
| }; |
| |
| /* Apps bus */ |
| apps: apps-bus@3e300000 { |
| compatible = "simple-bus"; |
| ranges = <0 0x3e300000 0x01c02000>; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| |
| usbotg: usb@e20000 { |
| compatible = "snps,dwc2"; |
| reg = <0x00e20000 0x10000>; |
| interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; |
| clocks = <&usb_otg_ahb_clk>; |
| clock-names = "otg"; |
| phys = <&usbphy>; |
| phy-names = "usb2-phy"; |
| status = "disabled"; |
| }; |
| |
| usbphy: usb-phy@e30000 { |
| compatible = "brcm,kona-usb2-phy"; |
| reg = <0x00e30000 0x28>; |
| #phy-cells = <0>; |
| status = "disabled"; |
| }; |
| |
| sdio1: mmc@e80000 { |
| compatible = "brcm,kona-sdhci"; |
| reg = <0x00e80000 0x801c>; |
| interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; |
| clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO1>; |
| status = "disabled"; |
| }; |
| |
| sdio2: mmc@e90000 { |
| compatible = "brcm,kona-sdhci"; |
| reg = <0x00e90000 0x801c>; |
| interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; |
| clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO2>; |
| status = "disabled"; |
| }; |
| |
| sdio3: mmc@ea0000 { |
| compatible = "brcm,kona-sdhci"; |
| reg = <0x00ea0000 0x801c>; |
| interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; |
| clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO3>; |
| status = "disabled"; |
| }; |
| |
| sdio4: mmc@eb0000 { |
| compatible = "brcm,kona-sdhci"; |
| reg = <0x00eb0000 0x801c>; |
| interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; |
| clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO4>; |
| status = "disabled"; |
| }; |
| }; |
| |
| clocks { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| ranges; |
| |
| /* |
| * Fixed clocks are defined before CCUs whose |
| * clocks may depend on them. |
| */ |
| |
| ref_32k_clk: ref_32k { |
| #clock-cells = <0>; |
| compatible = "fixed-clock"; |
| clock-frequency = <32768>; |
| }; |
| |
| bbl_32k_clk: bbl_32k { |
| #clock-cells = <0>; |
| compatible = "fixed-clock"; |
| clock-frequency = <32768>; |
| }; |
| |
| ref_13m_clk: ref_13m { |
| #clock-cells = <0>; |
| compatible = "fixed-clock"; |
| clock-frequency = <13000000>; |
| }; |
| |
| var_13m_clk: var_13m { |
| #clock-cells = <0>; |
| compatible = "fixed-clock"; |
| clock-frequency = <13000000>; |
| }; |
| |
| dft_19_5m_clk: dft_19_5m { |
| #clock-cells = <0>; |
| compatible = "fixed-clock"; |
| clock-frequency = <19500000>; |
| }; |
| |
| ref_crystal_clk: ref_crystal { |
| #clock-cells = <0>; |
| compatible = "fixed-clock"; |
| clock-frequency = <26000000>; |
| }; |
| |
| ref_52m_clk: ref_52m { |
| #clock-cells = <0>; |
| compatible = "fixed-clock"; |
| clock-frequency = <52000000>; |
| }; |
| |
| var_52m_clk: var_52m { |
| #clock-cells = <0>; |
| compatible = "fixed-clock"; |
| clock-frequency = <52000000>; |
| }; |
| |
| usb_otg_ahb_clk: usb_otg_ahb { |
| #clock-cells = <0>; |
| compatible = "fixed-clock"; |
| clock-frequency = <52000000>; |
| }; |
| |
| ref_96m_clk: ref_96m { |
| #clock-cells = <0>; |
| compatible = "fixed-clock"; |
| clock-frequency = <96000000>; |
| }; |
| |
| var_96m_clk: var_96m { |
| #clock-cells = <0>; |
| compatible = "fixed-clock"; |
| clock-frequency = <96000000>; |
| }; |
| |
| ref_104m_clk: ref_104m { |
| #clock-cells = <0>; |
| compatible = "fixed-clock"; |
| clock-frequency = <104000000>; |
| }; |
| |
| var_104m_clk: var_104m { |
| #clock-cells = <0>; |
| compatible = "fixed-clock"; |
| clock-frequency = <104000000>; |
| }; |
| |
| ref_156m_clk: ref_156m { |
| #clock-cells = <0>; |
| compatible = "fixed-clock"; |
| clock-frequency = <156000000>; |
| }; |
| |
| var_156m_clk: var_156m { |
| #clock-cells = <0>; |
| compatible = "fixed-clock"; |
| clock-frequency = <156000000>; |
| }; |
| |
| root_ccu: root_ccu@35001000 { |
| compatible = "brcm,bcm21664-root-ccu"; |
| reg = <0x35001000 0x0f00>; |
| #clock-cells = <1>; |
| clock-output-names = "frac_1m"; |
| }; |
| |
| aon_ccu: aon_ccu@35002000 { |
| compatible = "brcm,bcm21664-aon-ccu"; |
| reg = <0x35002000 0x0f00>; |
| #clock-cells = <1>; |
| clock-output-names = "hub_timer"; |
| }; |
| |
| slave_ccu: slave_ccu@3e011000 { |
| compatible = "brcm,bcm21664-slave-ccu"; |
| reg = <0x3e011000 0x0f00>; |
| #clock-cells = <1>; |
| clock-output-names = "uartb", |
| "uartb2", |
| "uartb3", |
| "bsc1", |
| "bsc2", |
| "bsc3", |
| "bsc4"; |
| }; |
| |
| master_ccu: master_ccu@3f001000 { |
| compatible = "brcm,bcm21664-master-ccu"; |
| reg = <0x3f001000 0x0f00>; |
| #clock-cells = <1>; |
| clock-output-names = "sdio1", |
| "sdio2", |
| "sdio3", |
| "sdio4", |
| "sdio1_sleep", |
| "sdio2_sleep", |
| "sdio3_sleep", |
| "sdio4_sleep"; |
| }; |
| }; |
| }; |
