| // SPDX-License-Identifier: GPL-2.0 |
| // Copyright (c) 2019 Nuvoton Technology <kwliu@nuvoton.com> |
| // Copyright (c) 2019 Quanta Computer Inc. <Samuel.Jiang@quantatw.com> |
| |
| /dts-v1/; |
| #include "nuvoton-npcm750.dtsi" |
| #include "nuvoton-npcm750-runbmc-olympus-pincfg.dtsi" |
| |
| #include <dt-bindings/i2c/i2c.h> |
| #include <dt-bindings/gpio/gpio.h> |
| |
| / { |
| model = "Nuvoton npcm750 RunBMC Olympus"; |
| compatible = "nuvoton,npcm750"; |
| |
| aliases { |
| ethernet1 = &gmac0; |
| serial0 = &serial0; |
| serial1 = &serial1; |
| serial2 = &serial2; |
| serial3 = &serial3; |
| i2c0 = &i2c0; |
| i2c1 = &i2c1; |
| i2c2 = &i2c2; |
| i2c3 = &i2c3; |
| i2c4 = &i2c4; |
| i2c5 = &i2c5; |
| i2c6 = &i2c6; |
| i2c7 = &i2c7; |
| i2c8 = &i2c8; |
| i2c9 = &i2c9; |
| i2c10 = &i2c10; |
| i2c11 = &i2c11; |
| i2c12 = &i2c12; |
| i2c13 = &i2c13; |
| spi0 = &spi0; |
| spi1 = &spi1; |
| fiu0 = &fiu0; |
| fiu1 = &fiu3; |
| }; |
| |
| chosen { |
| stdout-path = &serial3; |
| }; |
| |
| memory { |
| reg = <0 0x40000000>; |
| }; |
| |
| iio-hwmon { |
| compatible = "iio-hwmon"; |
| io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, |
| <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>; |
| }; |
| |
| leds { |
| compatible = "gpio-leds"; |
| heartbeat { |
| label = "heartbeat"; |
| gpios = <&gpio3 14 1>; |
| }; |
| |
| identify { |
| label = "identify"; |
| gpios = <&gpio3 15 1>; |
| }; |
| }; |
| |
| jtag { |
| compatible = "nuvoton,npcm750-jtag"; |
| enable_pspi_jtag = <1>; |
| pspi-index = <2>; |
| tck { |
| label = "tck"; |
| gpios = <&gpio0 19 0>; /* gpio19 */ |
| regbase = <0xf0010000 0x1000>; |
| }; |
| |
| tdi { |
| label = "tdi"; |
| gpios = <&gpio0 18 0>; /* gpio18 */ |
| regbase = <0xf0010000 0x1000>; |
| }; |
| |
| tdo { |
| label = "tdo"; |
| gpios = <&gpio0 17 0>; /* gpio17 */ |
| regbase = <0xf0010000 0x1000>; |
| }; |
| tms { |
| label = "tms"; |
| gpios = <&gpio0 16 0>; /* gpio16 */ |
| regbase = <0xf0010000 0x1000>; |
| }; |
| }; |
| }; |
| |
| &fiu0 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&spi0cs1_pins>; |
| status = "okay"; |
| |
| flash@0 { |
| compatible = "jedec,spi-nor"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| reg = <0>; |
| spi-rx-bus-width = <2>; |
| |
| partitions { |
| compatible = "fixed-partitions"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| bmc@0 { |
| label = "bmc"; |
| reg = <0x000000 0x2000000>; |
| }; |
| u-boot@0 { |
| label = "u-boot"; |
| reg = <0x0000000 0x80000>; |
| read-only; |
| }; |
| u-boot-env@100000 { |
| label = "u-boot-env"; |
| reg = <0x00100000 0x40000>; |
| }; |
| kernel@200000 { |
| label = "kernel"; |
| reg = <0x0200000 0x600000>; |
| }; |
| rofs@800000 { |
| label = "rofs"; |
| reg = <0x800000 0x1500000>; |
| }; |
| rwfs@1d00000 { |
| label = "rwfs"; |
| reg = <0x1d00000 0x300000>; |
| }; |
| }; |
| }; |
| |
| flash@1 { |
| compatible = "jedec,spi-nor"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| reg = <1>; |
| npcm,fiu-rx-bus-width = <2>; |
| |
| partitions { |
| compatible = "fixed-partitions"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| spare1@0 { |
| label = "spi0-cs1-spare1"; |
| reg = <0x0 0x800000>; |
| }; |
| spare2@800000 { |
| label = "spi0-cs1-spare2"; |
| reg = <0x800000 0x0>; |
| }; |
| }; |
| }; |
| }; |
| |
| &fiu3 { |
| pinctrl-0 = <&spi3_pins>; |
| status = "okay"; |
| |
| flash@0 { |
| compatible = "jedec,spi-nor"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| reg = <0>; |
| spi-rx-bus-width = <2>; |
| |
| partitions { |
| compatible = "fixed-partitions"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| system1@0 { |
| label = "spi3-system1"; |
| reg = <0x0 0x800000>; |
| }; |
| system2@800000 { |
| label = "spi3-system2"; |
| reg = <0x800000 0x0>; |
| }; |
| }; |
| }; |
| }; |
| |
| &gcr { |
| mux-controller { |
| compatible = "mmio-mux"; |
| #mux-control-cells = <1>; |
| |
| mux-reg-masks = <0x38 0x07>; |
| idle-states = <6>; |
| }; |
| }; |
| |
| &gmac0 { |
| phy-mode = "rgmii-id"; |
| snps,eee-force-disable; |
| status = "okay"; |
| }; |
| |
| &i2c1 { |
| status = "okay"; |
| |
| i2c-mux@70 { |
| compatible = "nxp,pca9548"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0x70>; |
| i2c-mux-idle-disconnect; |
| |
| i2c_slot1a: i2c@0 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0>; |
| }; |
| |
| i2c_slot1b: i2c@1 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <1>; |
| }; |
| |
| i2c_slot2a: i2c@2 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <2>; |
| }; |
| |
| i2c_slot2b: i2c@3 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <3>; |
| }; |
| |
| i2c_slot3: i2c@4 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <4>; |
| }; |
| |
| i2c_slot4: i2c@5 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <5>; |
| }; |
| |
| i2c_slot5: i2c@6 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <6>; |
| }; |
| }; |
| |
| i2c-mux@71 { |
| compatible = "nxp,pca9546"; |
| reg = <0x71>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| i2c-mux-idle-disconnect; |
| |
| i2c_m2_s1: i2c@0 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0>; |
| }; |
| |
| i2c_m2_s2: i2c@1 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <1>; |
| }; |
| i2c_m2_s3: i2c@2 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <2>; |
| }; |
| |
| i2c_m2_s4: i2c@3 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <3>; |
| }; |
| }; |
| }; |
| |
| &i2c2 { |
| status = "okay"; |
| |
| tmp421@4c { |
| compatible = "ti,tmp421"; |
| reg = <0x4c>; |
| }; |
| |
| power-supply@58 { |
| compatible = "delta,dps800"; |
| reg = <0x58>; |
| }; |
| }; |
| |
| &i2c3 { |
| status = "okay"; |
| }; |
| |
| &i2c4 { |
| status = "okay"; |
| |
| eeprom@54 { |
| compatible = "atmel,24c64"; |
| reg = <0x54>; |
| }; |
| }; |
| |
| &i2c5 { |
| status = "okay"; |
| |
| i2c-slave-mqueue@10 { |
| compatible = "i2c-slave-mqueue"; |
| reg = <(I2C_OWN_SLAVE_ADDRESS | 0x10)>; |
| }; |
| }; |
| |
| &i2c6 { |
| status = "okay"; |
| |
| ina219@40 { |
| compatible = "ti,ina219"; |
| reg = <0x40>; |
| }; |
| ina219@41 { |
| compatible = "ti,ina219"; |
| reg = <0x41>; |
| }; |
| ina219@44 { |
| compatible = "ti,ina219"; |
| reg = <0x44>; |
| }; |
| ina219@45 { |
| compatible = "ti,ina219"; |
| reg = <0x45>; |
| }; |
| tps53679@60 { |
| compatible = "ti,tps53679"; |
| reg = <0x60>; |
| }; |
| tps53659@62 { |
| compatible = "ti,tps53659"; |
| reg = <0x62>; |
| }; |
| tps53659@64 { |
| compatible = "ti,tps53659"; |
| reg = <0x64>; |
| }; |
| tps53622@67 { |
| compatible = "ti,tps53622"; |
| reg = <0x67>; |
| }; |
| tps53622@69 { |
| compatible = "ti,tps53622"; |
| reg = <0x69>; |
| }; |
| tps53679@70 { |
| compatible = "ti,tps53679"; |
| reg = <0x70>; |
| }; |
| tps53659@72 { |
| compatible = "ti,tps53659"; |
| reg = <0x72>; |
| }; |
| tps53659@74 { |
| compatible = "ti,tps53659"; |
| reg = <0x74>; |
| }; |
| tps53622@77 { |
| compatible = "ti,tps53622"; |
| reg = <0x77>; |
| }; |
| }; |
| |
| &i2c7 { |
| status = "okay"; |
| |
| tmp421@4c { |
| compatible = "ti,tmp421"; |
| reg = <0x4c>; |
| }; |
| }; |
| |
| &i2c8 { |
| status = "okay"; |
| |
| adm1278@11 { |
| compatible = "adm1278"; |
| reg = <0x11>; |
| Rsense = <500>; |
| }; |
| }; |
| |
| &i2c9 { |
| status = "okay"; |
| }; |
| |
| &i2c10 { |
| status = "okay"; |
| |
| gpio: pca9555@27 { |
| compatible = "nxp,pca9555"; |
| reg = <0x27>; |
| |
| gpio-controller; |
| #gpio-cells = <2>; |
| }; |
| }; |
| |
| &i2c11 { |
| status = "okay"; |
| |
| pca9539_g1a: pca9539-g1a@74 { |
| compatible = "nxp,pca9539"; |
| reg = <0x74>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| reset-gpios = <&gpio7 4 GPIO_ACTIVE_LOW>; |
| G1A_P0_0 { |
| gpio-hog; |
| gpios = <0 0>; |
| output-high; |
| line-name = "TPM_BMC_ALERT_N"; |
| }; |
| G1A_P0_1 { |
| gpio-hog; |
| gpios = <1 0>; |
| input; |
| line-name = "FM_BIOS_TOP_SWAP"; |
| }; |
| G1A_P0_2 { |
| gpio-hog; |
| gpios = <2 0>; |
| input; |
| line-name = "FM_BIOS_PREFRB2_GOOD"; |
| }; |
| G1A_P0_3 { |
| gpio-hog; |
| gpios = <3 0>; |
| input; |
| line-name = "BMC_SATAXPCIE_0TO3_SEL"; |
| }; |
| G1A_P0_4 { |
| gpio-hog; |
| gpios = <4 0>; |
| input; |
| line-name = "BMC_SATAXPCIE_4TO7_SEL"; |
| }; |
| G1A_P0_5 { |
| gpio-hog; |
| gpios = <5 0>; |
| output-low; |
| line-name = "FM_UV_ADR_TRIGGER_EN_N"; |
| }; |
| G1A_P0_6 { |
| gpio-hog; |
| gpios = <6 0>; |
| input; |
| line-name = "RM_THROTTLE_EN_N"; |
| }; |
| G1A_P1_0 { |
| gpio-hog; |
| gpios = <8 0>; |
| input; |
| line-name = "FM_BMC_TPM_PRES_N"; |
| }; |
| G1A_P1_1 { |
| gpio-hog; |
| gpios = <9 0>; |
| input; |
| line-name = "FM_CPU0_SKTOCC_LVT3_N"; |
| }; |
| G1A_P1_2 { |
| gpio-hog; |
| gpios = <10 0>; |
| input; |
| line-name = "FM_CPU1_SKTOCC_LVT3_N"; |
| }; |
| G1A_P1_3 { |
| gpio-hog; |
| gpios = <11 0>; |
| input; |
| line-name = "PSU1_ALERT_N"; |
| }; |
| G1A_P1_4 { |
| gpio-hog; |
| gpios = <12 0>; |
| input; |
| line-name = "PSU2_ALERT_N"; |
| }; |
| G1A_P1_5 { |
| gpio-hog; |
| gpios = <13 0>; |
| input; |
| line-name = "H_CPU0_FAST_WAKE_LVT3_N"; |
| }; |
| G1A_P1_6 { |
| gpio-hog; |
| gpios = <14 0>; |
| output-high; |
| line-name = "I2C_MUX1_RESET_N"; |
| }; |
| G1A_P1_7 { |
| gpio-hog; |
| gpios = <15 0>; |
| input; |
| line-name = "FM_CPU_CATERR_LVT3_N"; |
| }; |
| }; |
| |
| pca9539_g1b: pca9539-g1b@75 { |
| compatible = "nxp,pca9539"; |
| reg = <0x75>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| G1B_P0_0 { |
| gpio-hog; |
| gpios = <0 0>; |
| input; |
| line-name = "PVDDQ_ABC_PINALERT_N"; |
| }; |
| G1B_P0_1 { |
| gpio-hog; |
| gpios = <1 0>; |
| input; |
| line-name = "PVDDQ_DEF_PINALERT_N"; |
| }; |
| G1B_P0_2 { |
| gpio-hog; |
| gpios = <2 0>; |
| input; |
| line-name = "PVDDQ_GHJ_PINALERT_N"; |
| }; |
| G1B_P0_3 { |
| gpio-hog; |
| gpios = <3 0>; |
| input; |
| line-name = "PVDDQ_KLM_PINALERT_N"; |
| }; |
| G1B_P0_5 { |
| gpio-hog; |
| gpios = <5 0>; |
| input; |
| line-name = "FM_BOARD_REV_ID0"; |
| }; |
| G1B_P0_6 { |
| gpio-hog; |
| gpios = <6 0>; |
| input; |
| line-name = "FM_BOARD_REV_ID1"; |
| }; |
| G1B_P0_7 { |
| gpio-hog; |
| gpios = <7 0>; |
| input; |
| line-name = "FM_BOARD_REV_ID2"; |
| }; |
| G1B_P1_0 { |
| gpio-hog; |
| gpios = <8 0>; |
| input; |
| line-name = "FM_OC_DETECT_EN_N"; |
| }; |
| G1B_P1_1 { |
| gpio-hog; |
| gpios = <9 0>; |
| input; |
| line-name = "FM_FLASH_DESC_OVERRIDE"; |
| }; |
| G1B_P1_2 { |
| gpio-hog; |
| gpios = <10 0>; |
| output-low; |
| line-name = "FP_PWR_ID_LED_N"; |
| }; |
| G1B_P1_3 { |
| gpio-hog; |
| gpios = <11 0>; |
| output-low; |
| line-name = "BMC_LED_PWR_GRN"; |
| }; |
| G1B_P1_4 { |
| gpio-hog; |
| gpios = <12 0>; |
| output-low; |
| line-name = "BMC_LED_PWR_AMBER"; |
| }; |
| G1B_P1_5 { |
| gpio-hog; |
| gpios = <13 0>; |
| output-high; |
| line-name = "FM_BMC_FAULT_LED_N"; |
| }; |
| G1B_P1_6 { |
| gpio-hog; |
| gpios = <14 0>; |
| output-high; |
| line-name = "FM_CPLD_BMC_PWRDN_N"; |
| }; |
| G1B_P1_7 { |
| gpio-hog; |
| gpios = <15 0>; |
| output-high; |
| line-name = "BMC_LED_CATERR_N"; |
| }; |
| }; |
| }; |
| |
| &i2c12 { |
| status = "okay"; |
| |
| pca9539_g2a: pca9539-g2a@74 { |
| compatible = "nxp,pca9539"; |
| reg = <0x74>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| reset-gpios = <&gpio5 28 GPIO_ACTIVE_LOW>; |
| G2A_P0_0 { |
| gpio-hog; |
| gpios = <0 0>; |
| output-high; |
| line-name = "BMC_PON_RST_REQ_N"; |
| }; |
| G2A_P0_1 { |
| gpio-hog; |
| gpios = <1 0>; |
| output-high; |
| line-name = "BMC_RST_IND_REQ_N"; |
| }; |
| G2A_P0_2 { |
| gpio-hog; |
| gpios = <2 0>; |
| input; |
| line-name = "RST_BMC_RTCRST"; |
| }; |
| G2A_P0_3 { |
| gpio-hog; |
| gpios = <3 0>; |
| output-high; |
| line-name = "FM_BMC_PWRBTN_OUT_N"; |
| }; |
| G2A_P0_4 { |
| gpio-hog; |
| gpios = <4 0>; |
| output-high; |
| line-name = "RST_BMC_SYSRST_BTN_OUT_N"; |
| }; |
| G2A_P0_5 { |
| gpio-hog; |
| gpios = <5 0>; |
| output-high; |
| line-name = "FM_BATTERY_SENSE_EN_N"; |
| }; |
| G2A_P0_6 { |
| gpio-hog; |
| gpios = <6 0>; |
| output-high; |
| line-name = "FM_BMC_READY_N"; |
| }; |
| G2A_P0_7 { |
| gpio-hog; |
| gpios = <7 0>; |
| input; |
| line-name = "IRQ_BMC_PCH_SMI_LPC_N"; |
| }; |
| G2A_P1_0 { |
| gpio-hog; |
| gpios = <8 0>; |
| input; |
| line-name = "FM_SLOT4_CFG0"; |
| }; |
| G2A_P1_1 { |
| gpio-hog; |
| gpios = <9 0>; |
| input; |
| line-name = "FM_SLOT4_CFG1"; |
| }; |
| G2A_P1_2 { |
| gpio-hog; |
| gpios = <10 0>; |
| input; |
| line-name = "FM_NVDIMM_EVENT_N"; |
| }; |
| G2A_P1_3 { |
| gpio-hog; |
| gpios = <11 0>; |
| input; |
| line-name = "PSU1_BLADE_EN_N"; |
| }; |
| G2A_P1_4 { |
| gpio-hog; |
| gpios = <12 0>; |
| input; |
| line-name = "BMC_PCH_FNM"; |
| }; |
| G2A_P1_5 { |
| gpio-hog; |
| gpios = <13 0>; |
| input; |
| line-name = "FM_SOL_UART_CH_SEL"; |
| }; |
| G2A_P1_6 { |
| gpio-hog; |
| gpios = <14 0>; |
| input; |
| line-name = "FM_BIOS_POST_CMPLT_N"; |
| }; |
| }; |
| |
| pca9539_g2b: pca9539-g2b@75 { |
| compatible = "nxp,pca9539"; |
| reg = <0x75>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| G2B_P0_0 { |
| gpio-hog; |
| gpios = <0 0>; |
| input; |
| line-name = "FM_CPU_MSMI_LVT3_N"; |
| }; |
| G2B_P0_1 { |
| gpio-hog; |
| gpios = <1 0>; |
| input; |
| line-name = "FM_BIOS_MRC_DEBUG_MSG_DIS"; |
| }; |
| G2B_P0_2 { |
| gpio-hog; |
| gpios = <2 0>; |
| input; |
| line-name = "FM_CPU1_DISABLE_BMC_N"; |
| }; |
| G2B_P0_3 { |
| gpio-hog; |
| gpios = <3 0>; |
| output-low; |
| line-name = "BMC_JTAG_SELECT"; |
| }; |
| G2B_P0_4 { |
| gpio-hog; |
| gpios = <4 0>; |
| output-high; |
| line-name = "PECI_MUX_SELECT"; |
| }; |
| G2B_P0_5 { |
| gpio-hog; |
| gpios = <5 0>; |
| output-high; |
| line-name = "I2C_MUX2_RESET_N"; |
| }; |
| G2B_P0_6 { |
| gpio-hog; |
| gpios = <6 0>; |
| input; |
| line-name = "FM_BMC_CPLD_PSU2_ON"; |
| }; |
| G2B_P0_7 { |
| gpio-hog; |
| gpios = <7 0>; |
| output-high; |
| line-name = "PSU2_ALERT_EN_N"; |
| }; |
| G2B_P1_0 { |
| gpio-hog; |
| gpios = <8 0>; |
| output-high; |
| line-name = "FM_CPU_BMC_INIT"; |
| }; |
| G2B_P1_1 { |
| gpio-hog; |
| gpios = <9 0>; |
| output-high; |
| line-name = "IRQ_BMC_PCH_SCI_LPC_N"; |
| }; |
| G2B_P1_2 { |
| gpio-hog; |
| gpios = <10 0>; |
| output-low; |
| line-name = "PMB_ALERT_EN_N"; |
| }; |
| G2B_P1_3 { |
| gpio-hog; |
| gpios = <11 0>; |
| output-high; |
| line-name = "FM_FAST_PROCHOT_EN_N"; |
| }; |
| G2B_P1_4 { |
| gpio-hog; |
| gpios = <12 0>; |
| output-high; |
| line-name = "BMC_NVDIMM_PRSNT_N"; |
| }; |
| G2B_P1_5 { |
| gpio-hog; |
| gpios = <13 0>; |
| output-low; |
| line-name = "FM_BACKUP_BIOS_SEL_H_BMC"; |
| }; |
| G2B_P1_6 { |
| gpio-hog; |
| gpios = <14 0>; |
| output-high; |
| line-name = "FM_PWRBRK_N"; |
| }; |
| }; |
| }; |
| |
| &i2c13 { |
| status = "okay"; |
| |
| tmp75@4a { |
| compatible = "ti,tmp75"; |
| reg = <0x4a>; |
| status = "okay"; |
| }; |
| m24128_fru@51 { |
| compatible = "atmel,24c128"; |
| reg = <0x51>; |
| pagesize = <64>; |
| status = "okay"; |
| }; |
| }; |
| |
| &pwm_fan { |
| pinctrl-names = "default"; |
| pinctrl-0 = < &pwm0_pins &pwm1_pins |
| &fanin0_pins &fanin1_pins |
| &fanin2_pins &fanin3_pins |
| &fanin4_pins &fanin5_pins |
| &fanin6_pins &fanin7_pins |
| &fanin8_pins &fanin9_pins |
| &fanin10_pins &fanin11_pins>; |
| status = "okay"; |
| |
| fan@0 { |
| reg = <0x00>; |
| fan-tach-ch = /bits/ 8 <0x00 0x01>; |
| cooling-levels = <127 255>; |
| }; |
| fan@1 { |
| reg = <0x01>; |
| fan-tach-ch = /bits/ 8 <0x02 0x03>; |
| cooling-levels = /bits/ 8 <127 255>; |
| }; |
| fan@2 { |
| reg = <0x02>; |
| fan-tach-ch = /bits/ 8 <0x04 0x05>; |
| cooling-levels = /bits/ 8 <127 255>; |
| }; |
| fan@3 { |
| reg = <0x03>; |
| fan-tach-ch = /bits/ 8 <0x06 0x07>; |
| cooling-levels = /bits/ 8 <127 255>; |
| }; |
| fan@4 { |
| reg = <0x04>; |
| fan-tach-ch = /bits/ 8 <0x08 0x09>; |
| cooling-levels = /bits/ 8 <127 255>; |
| }; |
| fan@5 { |
| reg = <0x05>; |
| fan-tach-ch = /bits/ 8 <0x0A 0x0B>; |
| cooling-levels = /bits/ 8 <127 255>; |
| }; |
| fan@6 { |
| reg = <0x06>; |
| fan-tach-ch = /bits/ 8 <0x0C 0x0D>; |
| cooling-levels = /bits/ 8 <127 255>; |
| }; |
| fan@7 { |
| reg = <0x07>; |
| fan-tach-ch = /bits/ 8 <0x0E 0x0F>; |
| cooling-levels = /bits/ 8 <127 255>; |
| }; |
| }; |
| |
| &ehci1 { |
| status = "okay"; |
| }; |
| |
| &watchdog1 { |
| status = "okay"; |
| }; |
| |
| &rng { |
| status = "okay"; |
| }; |
| |
| &serial0 { |
| status = "okay"; |
| }; |
| |
| &serial1 { |
| status = "okay"; |
| }; |
| |
| &serial2 { |
| status = "okay"; |
| }; |
| |
| &serial3 { |
| status = "okay"; |
| }; |
| |
| &adc { |
| #io-channel-cells = <1>; |
| status = "okay"; |
| }; |
| |
| &kcs1 { |
| status = "okay"; |
| }; |
| |
| &kcs2 { |
| status = "okay"; |
| }; |
| |
| &kcs3 { |
| status = "okay"; |
| }; |
| |
| &spi0 { |
| cs-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>; |
| status = "okay"; |
| }; |
| |
| &spi1 { |
| status = "okay"; |
| }; |
| |
| &pinctrl { |
| pinctrl-names = "default"; |
| pinctrl-0 = < |
| /******* RunBMC inside Module pins *******/ |
| &gpio0ol_pins |
| &gpio1ol_pins |
| &gpio2ol_pins |
| &gpio3ol_pins |
| &gpio8o_pins |
| &gpio9ol_pins |
| &gpio12ol_pins |
| &gpio13ol_pins |
| &gpio14ol_pins |
| &gpio15ol_pins |
| &gpio37o_pins |
| &gpio38_pins |
| &gpio39_pins |
| &gpio94ol_pins |
| &gpio108ol_pins |
| &gpio109ol_pins |
| &gpio111ol_pins |
| &gpio112ol_pins |
| &gpio113ol_pins |
| &gpio208_pins |
| &gpio209ol_pins |
| &gpio210ol_pins |
| &gpio211ol_pins |
| &gpio212ol_pins |
| &gpio213ol_pins |
| &gpio214ol_pins |
| &gpio215ol_pins |
| &gpio216ol_pins |
| &gpio217ol_pins |
| /******* RunBMC outside Connector pins *******/ |
| &gpio5_pins |
| &gpio6_pins |
| &gpio7_pins |
| &gpio10_pins |
| &gpio11_pins |
| &gpio20_pins |
| &gpio21_pins |
| &gpio22o_pins |
| &gpio23_pins |
| &gpio24_pins |
| &gpio25_pins |
| &gpio30_pins |
| &gpio31_pins |
| &gpio40o_pins |
| &gpio59_pins |
| &gpio76_pins |
| &gpio77_pins |
| &gpio78o_pins |
| &gpio79_pins |
| &gpio82_pins |
| &gpio83_pins |
| &gpio84_pins |
| &gpio85o_pins |
| &gpio86ol_pins |
| &gpio87_pins |
| &gpio88_pins |
| &gpio89_pins |
| &gpio90_pins |
| &gpio93_pins |
| &gpio114o_pins |
| &gpio115_pins |
| &gpio120_pins |
| &gpio121_pins |
| &gpio122_pins |
| &gpio123_pins |
| &gpio124_pins |
| &gpio125_pins |
| &gpio126_pins |
| &gpio127o_pins |
| &gpio136_pins |
| &gpio137_pins |
| &gpio138_pins |
| &gpio139_pins |
| &gpio140_pins |
| &gpio141_pins |
| &gpio142_pins |
| &gpio143_pins |
| &gpio144_pins |
| &gpio146_pins |
| &gpio145_pins |
| &gpio147_pins |
| &gpio153o_pins |
| &gpio155_pins |
| &gpio160o_pins |
| &gpio169o_pins |
| &gpio188o_pins |
| &gpio189_pins |
| &gpio196_pins |
| &gpio197_pins |
| &gpio198o_pins |
| &gpio199o_pins |
| &gpio200_pins |
| &gpio202_pins |
| &gpio203o_pins |
| &gpio224_pins |
| &gpio225ol_pins |
| &gpio226ol_pins |
| &gpio227ol_pins |
| &gpio228o_pins |
| &gpio229o_pins |
| &gpio230_pins |
| &gpio231o_pins |
| &ddc_pins |
| &wdog1_pins |
| &wdog2_pins |
| >; |
| }; |
