| /* SPDX-License-Identifier: GPL-2.0 |
| * |
| * Copyright 2016-2018 HabanaLabs, Ltd. |
| * All Rights Reserved. |
| * |
| */ |
| |
| /************************************ |
| ** This is an auto-generated file ** |
| ** DO NOT EDIT BELOW ** |
| ************************************/ |
| |
| #ifndef ASIC_REG_NIF_RTR_CTRL_4_REGS_H_ |
| #define ASIC_REG_NIF_RTR_CTRL_4_REGS_H_ |
| |
| /* |
| ***************************************** |
| * NIF_RTR_CTRL_4 (Prototype: RTR_CTRL) |
| ***************************************** |
| */ |
| |
| #define mmNIF_RTR_CTRL_4_PERM_SEL 0x3C6108 |
| |
| #define mmNIF_RTR_CTRL_4_HBM_POLY_H3_0 0x3C6114 |
| |
| #define mmNIF_RTR_CTRL_4_HBM_POLY_H3_1 0x3C6118 |
| |
| #define mmNIF_RTR_CTRL_4_HBM_POLY_H3_2 0x3C611C |
| |
| #define mmNIF_RTR_CTRL_4_HBM_POLY_H3_3 0x3C6120 |
| |
| #define mmNIF_RTR_CTRL_4_HBM_POLY_H3_4 0x3C6124 |
| |
| #define mmNIF_RTR_CTRL_4_HBM_POLY_H3_5 0x3C6128 |
| |
| #define mmNIF_RTR_CTRL_4_HBM_POLY_H3_6 0x3C612C |
| |
| #define mmNIF_RTR_CTRL_4_HBM_POLY_H3_7 0x3C6130 |
| |
| #define mmNIF_RTR_CTRL_4_HBM_POLY_H3_8 0x3C6134 |
| |
| #define mmNIF_RTR_CTRL_4_HBM_POLY_H3_9 0x3C6138 |
| |
| #define mmNIF_RTR_CTRL_4_HBM_POLY_H3_10 0x3C613C |
| |
| #define mmNIF_RTR_CTRL_4_HBM_POLY_H3_11 0x3C6140 |
| |
| #define mmNIF_RTR_CTRL_4_HBM_POLY_H3_12 0x3C6144 |
| |
| #define mmNIF_RTR_CTRL_4_HBM_POLY_H3_13 0x3C6148 |
| |
| #define mmNIF_RTR_CTRL_4_HBM_POLY_H3_14 0x3C614C |
| |
| #define mmNIF_RTR_CTRL_4_HBM_POLY_H3_15 0x3C6150 |
| |
| #define mmNIF_RTR_CTRL_4_HBM_POLY_H3_16 0x3C6154 |
| |
| #define mmNIF_RTR_CTRL_4_HBM_POLY_H3_17 0x3C6158 |
| |
| #define mmNIF_RTR_CTRL_4_HBM_POLY_H3_18 0x3C615C |
| |
| #define mmNIF_RTR_CTRL_4_HBM_POLY_H3_19 0x3C6160 |
| |
| #define mmNIF_RTR_CTRL_4_HBM_POLY_H3_20 0x3C6164 |
| |
| #define mmNIF_RTR_CTRL_4_HBM_POLY_H3_21 0x3C6168 |
| |
| #define mmNIF_RTR_CTRL_4_HBM_POLY_H3_22 0x3C616C |
| |
| #define mmNIF_RTR_CTRL_4_HBM_POLY_H3_23 0x3C6170 |
| |
| #define mmNIF_RTR_CTRL_4_HBM_POLY_H3_24 0x3C6174 |
| |
| #define mmNIF_RTR_CTRL_4_HBM_POLY_H3_25 0x3C6178 |
| |
| #define mmNIF_RTR_CTRL_4_HBM_POLY_H3_26 0x3C617C |
| |
| #define mmNIF_RTR_CTRL_4_HBM_POLY_H3_27 0x3C6180 |
| |
| #define mmNIF_RTR_CTRL_4_SRAM_POLY_H3_0 0x3C6184 |
| |
| #define mmNIF_RTR_CTRL_4_SRAM_POLY_H3_1 0x3C6188 |
| |
| #define mmNIF_RTR_CTRL_4_SRAM_POLY_H3_2 0x3C618C |
| |
| #define mmNIF_RTR_CTRL_4_SRAM_POLY_H3_3 0x3C6190 |
| |
| #define mmNIF_RTR_CTRL_4_SRAM_POLY_H3_4 0x3C6194 |
| |
| #define mmNIF_RTR_CTRL_4_SRAM_POLY_H3_5 0x3C6198 |
| |
| #define mmNIF_RTR_CTRL_4_SRAM_POLY_H3_6 0x3C619C |
| |
| #define mmNIF_RTR_CTRL_4_SRAM_POLY_H3_7 0x3C61A0 |
| |
| #define mmNIF_RTR_CTRL_4_SRAM_POLY_H3_8 0x3C61A4 |
| |
| #define mmNIF_RTR_CTRL_4_SRAM_POLY_H3_9 0x3C61A8 |
| |
| #define mmNIF_RTR_CTRL_4_SRAM_POLY_H3_10 0x3C61AC |
| |
| #define mmNIF_RTR_CTRL_4_SRAM_POLY_H3_11 0x3C61B0 |
| |
| #define mmNIF_RTR_CTRL_4_SRAM_POLY_H3_12 0x3C61B4 |
| |
| #define mmNIF_RTR_CTRL_4_SRAM_POLY_H3_13 0x3C61B8 |
| |
| #define mmNIF_RTR_CTRL_4_SRAM_POLY_H3_14 0x3C61BC |
| |
| #define mmNIF_RTR_CTRL_4_SCRAM_SRAM_EN 0x3C626C |
| |
| #define mmNIF_RTR_CTRL_4_RL_HBM_EN 0x3C6274 |
| |
| #define mmNIF_RTR_CTRL_4_RL_HBM_SAT 0x3C6278 |
| |
| #define mmNIF_RTR_CTRL_4_RL_HBM_RST 0x3C627C |
| |
| #define mmNIF_RTR_CTRL_4_RL_HBM_TIMEOUT 0x3C6280 |
| |
| #define mmNIF_RTR_CTRL_4_SCRAM_HBM_EN 0x3C6284 |
| |
| #define mmNIF_RTR_CTRL_4_RL_PCI_EN 0x3C6288 |
| |
| #define mmNIF_RTR_CTRL_4_RL_PCI_SAT 0x3C628C |
| |
| #define mmNIF_RTR_CTRL_4_RL_PCI_RST 0x3C6290 |
| |
| #define mmNIF_RTR_CTRL_4_RL_PCI_TIMEOUT 0x3C6294 |
| |
| #define mmNIF_RTR_CTRL_4_RL_SRAM_EN 0x3C629C |
| |
| #define mmNIF_RTR_CTRL_4_RL_SRAM_SAT 0x3C62A0 |
| |
| #define mmNIF_RTR_CTRL_4_RL_SRAM_RST 0x3C62A4 |
| |
| #define mmNIF_RTR_CTRL_4_RL_SRAM_TIMEOUT 0x3C62AC |
| |
| #define mmNIF_RTR_CTRL_4_RL_SRAM_RED 0x3C62B4 |
| |
| #define mmNIF_RTR_CTRL_4_E2E_HBM_EN 0x3C62EC |
| |
| #define mmNIF_RTR_CTRL_4_E2E_PCI_EN 0x3C62F0 |
| |
| #define mmNIF_RTR_CTRL_4_E2E_HBM_WR_SIZE 0x3C62F4 |
| |
| #define mmNIF_RTR_CTRL_4_E2E_PCI_WR_SIZE 0x3C62F8 |
| |
| #define mmNIF_RTR_CTRL_4_E2E_AW_PCI_CTR_SET_EN 0x3C6404 |
| |
| #define mmNIF_RTR_CTRL_4_E2E_AW_PCI_CTR_SET 0x3C6408 |
| |
| #define mmNIF_RTR_CTRL_4_E2E_AW_PCI_CTR_WRAP 0x3C640C |
| |
| #define mmNIF_RTR_CTRL_4_E2E_AW_PCI_CTR_CNT 0x3C6410 |
| |
| #define mmNIF_RTR_CTRL_4_E2E_AW_HBM_CTR_SET_EN 0x3C6414 |
| |
| #define mmNIF_RTR_CTRL_4_E2E_AW_HBM_CTR_SET 0x3C6418 |
| |
| #define mmNIF_RTR_CTRL_4_E2E_HBM_RD_SIZE 0x3C641C |
| |
| #define mmNIF_RTR_CTRL_4_E2E_PCI_RD_SIZE 0x3C6420 |
| |
| #define mmNIF_RTR_CTRL_4_E2E_AR_PCI_CTR_SET_EN 0x3C6424 |
| |
| #define mmNIF_RTR_CTRL_4_E2E_AR_PCI_CTR_SET 0x3C6428 |
| |
| #define mmNIF_RTR_CTRL_4_E2E_AR_PCI_CTR_WRAP 0x3C642C |
| |
| #define mmNIF_RTR_CTRL_4_E2E_AR_PCI_CTR_CNT 0x3C6430 |
| |
| #define mmNIF_RTR_CTRL_4_E2E_AR_HBM_CTR_SET_EN 0x3C6434 |
| |
| #define mmNIF_RTR_CTRL_4_E2E_AR_HBM_CTR_SET 0x3C6438 |
| |
| #define mmNIF_RTR_CTRL_4_NL_HBM_SEL_0 0x3C6450 |
| |
| #define mmNIF_RTR_CTRL_4_NL_HBM_SEL_1 0x3C6454 |
| |
| #define mmNIF_RTR_CTRL_4_NON_LIN_EN 0x3C6480 |
| |
| #define mmNIF_RTR_CTRL_4_NL_SRAM_BANK_0 0x3C6500 |
| |
| #define mmNIF_RTR_CTRL_4_NL_SRAM_BANK_1 0x3C6504 |
| |
| #define mmNIF_RTR_CTRL_4_NL_SRAM_BANK_2 0x3C6508 |
| |
| #define mmNIF_RTR_CTRL_4_NL_SRAM_BANK_3 0x3C650C |
| |
| #define mmNIF_RTR_CTRL_4_NL_SRAM_BANK_4 0x3C6510 |
| |
| #define mmNIF_RTR_CTRL_4_NL_SRAM_OFFSET_0 0x3C6514 |
| |
| #define mmNIF_RTR_CTRL_4_NL_SRAM_OFFSET_1 0x3C6520 |
| |
| #define mmNIF_RTR_CTRL_4_NL_SRAM_OFFSET_2 0x3C6524 |
| |
| #define mmNIF_RTR_CTRL_4_NL_SRAM_OFFSET_3 0x3C6528 |
| |
| #define mmNIF_RTR_CTRL_4_NL_SRAM_OFFSET_4 0x3C652C |
| |
| #define mmNIF_RTR_CTRL_4_NL_SRAM_OFFSET_5 0x3C6530 |
| |
| #define mmNIF_RTR_CTRL_4_NL_SRAM_OFFSET_6 0x3C6534 |
| |
| #define mmNIF_RTR_CTRL_4_NL_SRAM_OFFSET_7 0x3C6538 |
| |
| #define mmNIF_RTR_CTRL_4_NL_SRAM_OFFSET_8 0x3C653C |
| |
| #define mmNIF_RTR_CTRL_4_NL_SRAM_OFFSET_9 0x3C6540 |
| |
| #define mmNIF_RTR_CTRL_4_NL_HBM_OFFSET_0 0x3C6550 |
| |
| #define mmNIF_RTR_CTRL_4_NL_HBM_OFFSET_1 0x3C6554 |
| |
| #define mmNIF_RTR_CTRL_4_NL_HBM_OFFSET_2 0x3C6558 |
| |
| #define mmNIF_RTR_CTRL_4_NL_HBM_OFFSET_3 0x3C655C |
| |
| #define mmNIF_RTR_CTRL_4_NL_HBM_OFFSET_4 0x3C6560 |
| |
| #define mmNIF_RTR_CTRL_4_NL_HBM_OFFSET_5 0x3C6564 |
| |
| #define mmNIF_RTR_CTRL_4_NL_HBM_OFFSET_6 0x3C6568 |
| |
| #define mmNIF_RTR_CTRL_4_NL_HBM_OFFSET_7 0x3C656C |
| |
| #define mmNIF_RTR_CTRL_4_NL_HBM_OFFSET_8 0x3C6570 |
| |
| #define mmNIF_RTR_CTRL_4_NL_HBM_OFFSET_9 0x3C6574 |
| |
| #define mmNIF_RTR_CTRL_4_NL_HBM_OFFSET_10 0x3C6578 |
| |
| #define mmNIF_RTR_CTRL_4_NL_HBM_OFFSET_11 0x3C657C |
| |
| #define mmNIF_RTR_CTRL_4_NL_HBM_OFFSET_12 0x3C6580 |
| |
| #define mmNIF_RTR_CTRL_4_NL_HBM_OFFSET_13 0x3C6584 |
| |
| #define mmNIF_RTR_CTRL_4_NL_HBM_OFFSET_14 0x3C6588 |
| |
| #define mmNIF_RTR_CTRL_4_NL_HBM_OFFSET_15 0x3C658C |
| |
| #define mmNIF_RTR_CTRL_4_NL_HBM_OFFSET_16 0x3C6590 |
| |
| #define mmNIF_RTR_CTRL_4_NL_HBM_OFFSET_17 0x3C6594 |
| |
| #define mmNIF_RTR_CTRL_4_NL_HBM_OFFSET_18 0x3C6598 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AW_0 0x3C65E4 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AW_1 0x3C65E8 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AW_2 0x3C65EC |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AW_3 0x3C65F0 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AW_4 0x3C65F4 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AW_5 0x3C65F8 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AW_6 0x3C65FC |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AW_7 0x3C6600 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AW_8 0x3C6604 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AW_9 0x3C6608 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AW_10 0x3C660C |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AW_11 0x3C6610 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AW_12 0x3C6614 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AW_13 0x3C6618 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AW_14 0x3C661C |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AW_15 0x3C6620 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AW_0 0x3C6624 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AW_1 0x3C6628 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AW_2 0x3C662C |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AW_3 0x3C6630 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AW_4 0x3C6634 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AW_5 0x3C6638 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AW_6 0x3C663C |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AW_7 0x3C6640 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AW_8 0x3C6644 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AW_9 0x3C6648 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AW_10 0x3C664C |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AW_11 0x3C6650 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AW_12 0x3C6654 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AW_13 0x3C6658 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AW_14 0x3C665C |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AW_15 0x3C6660 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AW_0 0x3C6664 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AW_1 0x3C6668 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AW_2 0x3C666C |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AW_3 0x3C6670 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AW_4 0x3C6674 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AW_5 0x3C6678 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AW_6 0x3C667C |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AW_7 0x3C6680 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AW_8 0x3C6684 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AW_9 0x3C6688 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AW_10 0x3C668C |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AW_11 0x3C6690 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AW_12 0x3C6694 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AW_13 0x3C6698 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AW_14 0x3C669C |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AW_15 0x3C66A0 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AW_0 0x3C66A4 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AW_1 0x3C66A8 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AW_2 0x3C66AC |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AW_3 0x3C66B0 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AW_4 0x3C66B4 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AW_5 0x3C66B8 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AW_6 0x3C66BC |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AW_7 0x3C66C0 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AW_8 0x3C66C4 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AW_9 0x3C66C8 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AW_10 0x3C66CC |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AW_11 0x3C66D0 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AW_12 0x3C66D4 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AW_13 0x3C66D8 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AW_14 0x3C66DC |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AW_15 0x3C66E0 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AW_0 0x3C66E4 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AW_1 0x3C66E8 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AW_2 0x3C66EC |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AW_3 0x3C66F0 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AW_4 0x3C66F4 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AW_5 0x3C66F8 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AW_6 0x3C66FC |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AW_7 0x3C6700 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AW_8 0x3C6704 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AW_9 0x3C6708 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AW_10 0x3C670C |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AW_11 0x3C6710 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AW_12 0x3C6714 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AW_13 0x3C6718 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AW_14 0x3C671C |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AW_15 0x3C6720 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AW_0 0x3C6724 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AW_1 0x3C6728 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AW_2 0x3C672C |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AW_3 0x3C6730 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AW_4 0x3C6734 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AW_5 0x3C6738 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AW_6 0x3C673C |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AW_7 0x3C6740 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AW_8 0x3C6744 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AW_9 0x3C6748 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AW_10 0x3C674C |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AW_11 0x3C6750 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AW_12 0x3C6754 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AW_13 0x3C6758 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AW_14 0x3C675C |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AW_15 0x3C6760 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AW_0 0x3C6764 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AW_1 0x3C6768 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AW_2 0x3C676C |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AW_3 0x3C6770 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AW_4 0x3C6774 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AW_5 0x3C6778 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AW_6 0x3C677C |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AW_7 0x3C6780 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AW_8 0x3C6784 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AW_9 0x3C6788 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AW_10 0x3C678C |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AW_11 0x3C6790 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AW_12 0x3C6794 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AW_13 0x3C6798 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AW_14 0x3C679C |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AW_15 0x3C67A0 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AW_0 0x3C67A4 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AW_1 0x3C67A8 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AW_2 0x3C67AC |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AW_3 0x3C67B0 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AW_4 0x3C67B4 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AW_5 0x3C67B8 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AW_6 0x3C67BC |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AW_7 0x3C67C0 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AW_8 0x3C67C4 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AW_9 0x3C67C8 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AW_10 0x3C67CC |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AW_11 0x3C67D0 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AW_12 0x3C67D4 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AW_13 0x3C67D8 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AW_14 0x3C67DC |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AW_15 0x3C67E0 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AR_0 0x3C6824 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AR_1 0x3C6828 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AR_2 0x3C682C |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AR_3 0x3C6830 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AR_4 0x3C6834 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AR_5 0x3C6838 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AR_6 0x3C683C |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AR_7 0x3C6840 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AR_8 0x3C6844 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AR_9 0x3C6848 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AR_10 0x3C684C |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AR_11 0x3C6850 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AR_12 0x3C6854 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AR_13 0x3C6858 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AR_14 0x3C685C |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AR_15 0x3C6860 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AR_0 0x3C6864 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AR_1 0x3C6868 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AR_2 0x3C686C |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AR_3 0x3C6870 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AR_4 0x3C6874 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AR_5 0x3C6878 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AR_6 0x3C687C |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AR_7 0x3C6880 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AR_8 0x3C6884 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AR_9 0x3C6888 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AR_10 0x3C688C |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AR_11 0x3C6890 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AR_12 0x3C6894 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AR_13 0x3C6898 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AR_14 0x3C689C |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AR_15 0x3C68A0 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AR_0 0x3C68A4 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AR_1 0x3C68A8 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AR_2 0x3C68AC |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AR_3 0x3C68B0 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AR_4 0x3C68B4 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AR_5 0x3C68B8 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AR_6 0x3C68BC |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AR_7 0x3C68C0 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AR_8 0x3C68C4 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AR_9 0x3C68C8 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AR_10 0x3C68CC |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AR_11 0x3C68D0 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AR_12 0x3C68D4 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AR_13 0x3C68D8 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AR_14 0x3C68DC |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AR_15 0x3C68E0 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AR_0 0x3C68E4 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AR_1 0x3C68E8 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AR_2 0x3C68EC |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AR_3 0x3C68F0 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AR_4 0x3C68F4 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AR_5 0x3C68F8 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AR_6 0x3C68FC |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AR_7 0x3C6900 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AR_8 0x3C6904 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AR_9 0x3C6908 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AR_10 0x3C690C |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AR_11 0x3C6910 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AR_12 0x3C6914 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AR_13 0x3C6918 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AR_14 0x3C691C |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AR_15 0x3C6920 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AR_0 0x3C6924 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AR_1 0x3C6928 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AR_2 0x3C692C |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AR_3 0x3C6930 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AR_4 0x3C6934 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AR_5 0x3C6938 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AR_6 0x3C693C |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AR_7 0x3C6940 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AR_8 0x3C6944 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AR_9 0x3C6948 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AR_10 0x3C694C |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AR_11 0x3C6950 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AR_12 0x3C6954 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AR_13 0x3C6958 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AR_14 0x3C695C |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AR_15 0x3C6960 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AR_0 0x3C6964 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AR_1 0x3C6968 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AR_2 0x3C696C |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AR_3 0x3C6970 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AR_4 0x3C6974 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AR_5 0x3C6978 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AR_6 0x3C697C |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AR_7 0x3C6980 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AR_8 0x3C6984 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AR_9 0x3C6988 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AR_10 0x3C698C |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AR_11 0x3C6990 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AR_12 0x3C6994 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AR_13 0x3C6998 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AR_14 0x3C699C |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AR_15 0x3C69A0 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AR_0 0x3C69A4 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AR_1 0x3C69A8 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AR_2 0x3C69AC |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AR_3 0x3C69B0 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AR_4 0x3C69B4 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AR_5 0x3C69B8 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AR_6 0x3C69BC |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AR_7 0x3C69C0 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AR_8 0x3C69C4 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AR_9 0x3C69C8 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AR_10 0x3C69CC |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AR_11 0x3C69D0 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AR_12 0x3C69D4 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AR_13 0x3C69D8 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AR_14 0x3C69DC |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AR_15 0x3C69E0 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AR_0 0x3C69E4 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AR_1 0x3C69E8 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AR_2 0x3C69EC |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AR_3 0x3C69F0 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AR_4 0x3C69F4 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AR_5 0x3C69F8 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AR_6 0x3C69FC |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AR_7 0x3C6A00 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AR_8 0x3C6A04 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AR_9 0x3C6A08 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AR_10 0x3C6A0C |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AR_11 0x3C6A10 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AR_12 0x3C6A14 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AR_13 0x3C6A18 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AR_14 0x3C6A1C |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AR_15 0x3C6A20 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_HIT_AW 0x3C6A64 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_SEC_HIT_AR 0x3C6A68 |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_HIT_AW 0x3C6A6C |
| |
| #define mmNIF_RTR_CTRL_4_RANGE_PRIV_HIT_AR 0x3C6A70 |
| |
| #define mmNIF_RTR_CTRL_4_RGL_CFG 0x3C6B64 |
| |
| #define mmNIF_RTR_CTRL_4_RGL_SHIFT 0x3C6B68 |
| |
| #define mmNIF_RTR_CTRL_4_RGL_EXPECTED_LAT_0 0x3C6B6C |
| |
| #define mmNIF_RTR_CTRL_4_RGL_EXPECTED_LAT_1 0x3C6B70 |
| |
| #define mmNIF_RTR_CTRL_4_RGL_EXPECTED_LAT_2 0x3C6B74 |
| |
| #define mmNIF_RTR_CTRL_4_RGL_EXPECTED_LAT_3 0x3C6B78 |
| |
| #define mmNIF_RTR_CTRL_4_RGL_EXPECTED_LAT_4 0x3C6B7C |
| |
| #define mmNIF_RTR_CTRL_4_RGL_EXPECTED_LAT_5 0x3C6B80 |
| |
| #define mmNIF_RTR_CTRL_4_RGL_EXPECTED_LAT_6 0x3C6B84 |
| |
| #define mmNIF_RTR_CTRL_4_RGL_EXPECTED_LAT_7 0x3C6B88 |
| |
| #define mmNIF_RTR_CTRL_4_RGL_TOKEN_0 0x3C6BAC |
| |
| #define mmNIF_RTR_CTRL_4_RGL_TOKEN_1 0x3C6BB0 |
| |
| #define mmNIF_RTR_CTRL_4_RGL_TOKEN_2 0x3C6BB4 |
| |
| #define mmNIF_RTR_CTRL_4_RGL_TOKEN_3 0x3C6BB8 |
| |
| #define mmNIF_RTR_CTRL_4_RGL_TOKEN_4 0x3C6BBC |
| |
| #define mmNIF_RTR_CTRL_4_RGL_TOKEN_5 0x3C6BC0 |
| |
| #define mmNIF_RTR_CTRL_4_RGL_TOKEN_6 0x3C6BC4 |
| |
| #define mmNIF_RTR_CTRL_4_RGL_TOKEN_7 0x3C6BC8 |
| |
| #define mmNIF_RTR_CTRL_4_RGL_BANK_ID_0 0x3C6BEC |
| |
| #define mmNIF_RTR_CTRL_4_RGL_BANK_ID_1 0x3C6BF0 |
| |
| #define mmNIF_RTR_CTRL_4_RGL_BANK_ID_2 0x3C6BF4 |
| |
| #define mmNIF_RTR_CTRL_4_RGL_BANK_ID_3 0x3C6BF8 |
| |
| #define mmNIF_RTR_CTRL_4_RGL_BANK_ID_4 0x3C6BFC |
| |
| #define mmNIF_RTR_CTRL_4_RGL_BANK_ID_5 0x3C6C00 |
| |
| #define mmNIF_RTR_CTRL_4_RGL_BANK_ID_6 0x3C6C04 |
| |
| #define mmNIF_RTR_CTRL_4_RGL_BANK_ID_7 0x3C6C08 |
| |
| #define mmNIF_RTR_CTRL_4_RGL_WDT 0x3C6C2C |
| |
| #define mmNIF_RTR_CTRL_4_E2E_AR_HBM0_CH0_CTR_WRAP 0x3C6C30 |
| |
| #define mmNIF_RTR_CTRL_4_E2E_AR_HBM0_CH1_CTR_WRAP 0x3C6C34 |
| |
| #define mmNIF_RTR_CTRL_4_E2E_AR_HBM1_CH0_CTR_WRAP 0x3C6C38 |
| |
| #define mmNIF_RTR_CTRL_4_E2E_AR_HBM1_CH1_CTR_WRAP 0x3C6C3C |
| |
| #define mmNIF_RTR_CTRL_4_E2E_AR_HBM2_CH0_CTR_WRAP 0x3C6C40 |
| |
| #define mmNIF_RTR_CTRL_4_E2E_AR_HBM2_CH1_CTR_WRAP 0x3C6C44 |
| |
| #define mmNIF_RTR_CTRL_4_E2E_AR_HBM3_CH0_CTR_WRAP 0x3C6C48 |
| |
| #define mmNIF_RTR_CTRL_4_E2E_AR_HBM3_CH1_CTR_WRAP 0x3C6C4C |
| |
| #define mmNIF_RTR_CTRL_4_E2E_AR_HBM0_CH0_CTR_CNT 0x3C6C50 |
| |
| #define mmNIF_RTR_CTRL_4_E2E_AR_HBM0_CH1_CTR_CNT 0x3C6C54 |
| |
| #define mmNIF_RTR_CTRL_4_E2E_AR_HBM1_CH0_CTR_CNT 0x3C6C58 |
| |
| #define mmNIF_RTR_CTRL_4_E2E_AR_HBM1_CH1_CTR_CNT 0x3C6C5C |
| |
| #define mmNIF_RTR_CTRL_4_E2E_AR_HBM2_CH0_CTR_CNT 0x3C6C60 |
| |
| #define mmNIF_RTR_CTRL_4_E2E_AR_HBM2_CH1_CTR_CNT 0x3C6C64 |
| |
| #define mmNIF_RTR_CTRL_4_E2E_AR_HBM3_CH0_CTR_CNT 0x3C6C68 |
| |
| #define mmNIF_RTR_CTRL_4_E2E_AR_HBM3_CH1_CTR_CNT 0x3C6C6C |
| |
| #define mmNIF_RTR_CTRL_4_E2E_AW_HBM0_CH0_CTR_WRAP 0x3C6C70 |
| |
| #define mmNIF_RTR_CTRL_4_E2E_AW_HBM0_CH1_CTR_WRAP 0x3C6C74 |
| |
| #define mmNIF_RTR_CTRL_4_E2E_AW_HBM1_CH0_CTR_WRAP 0x3C6C78 |
| |
| #define mmNIF_RTR_CTRL_4_E2E_AW_HBM1_CH1_CTR_WRAP 0x3C6C7C |
| |
| #define mmNIF_RTR_CTRL_4_E2E_AW_HBM2_CH0_CTR_WRAP 0x3C6C80 |
| |
| #define mmNIF_RTR_CTRL_4_E2E_AW_HBM2_CH1_CTR_WRAP 0x3C6C84 |
| |
| #define mmNIF_RTR_CTRL_4_E2E_AW_HBM3_CH0_CTR_WRAP 0x3C6C88 |
| |
| #define mmNIF_RTR_CTRL_4_E2E_AW_HBM3_CH1_CTR_WRAP 0x3C6C8C |
| |
| #define mmNIF_RTR_CTRL_4_E2E_AW_HBM0_CH0_CTR_CNT 0x3C6C90 |
| |
| #define mmNIF_RTR_CTRL_4_E2E_AW_HBM0_CH1_CTR_CNT 0x3C6C94 |
| |
| #define mmNIF_RTR_CTRL_4_E2E_AW_HBM1_CH0_CTR_CNT 0x3C6C98 |
| |
| #define mmNIF_RTR_CTRL_4_E2E_AW_HBM1_CH1_CTR_CNT 0x3C6C9C |
| |
| #define mmNIF_RTR_CTRL_4_E2E_AW_HBM2_CH0_CTR_CNT 0x3C6CA0 |
| |
| #define mmNIF_RTR_CTRL_4_E2E_AW_HBM2_CH1_CTR_CNT 0x3C6CA4 |
| |
| #define mmNIF_RTR_CTRL_4_E2E_AW_HBM3_CH0_CTR_CNT 0x3C6CA8 |
| |
| #define mmNIF_RTR_CTRL_4_E2E_AW_HBM3_CH1_CTR_CNT 0x3C6CAC |
| |
| #define mmNIF_RTR_CTRL_4_NL_HBM_PC_SEL_0 0x3C6CB0 |
| |
| #define mmNIF_RTR_CTRL_4_NL_HBM_PC_SEL_1 0x3C6CB4 |
| |
| #define mmNIF_RTR_CTRL_4_NL_HBM_PC_SEL_2 0x3C6CB8 |
| |
| #define mmNIF_RTR_CTRL_4_NL_HBM_PC_SEL_3 0x3C6CBC |
| |
| #endif /* ASIC_REG_NIF_RTR_CTRL_4_REGS_H_ */ |
