| /* SPDX-License-Identifier: GPL-2.0 |
| * |
| * Copyright 2016-2018 HabanaLabs, Ltd. |
| * All Rights Reserved. |
| * |
| */ |
| |
| /************************************ |
| ** This is an auto-generated file ** |
| ** DO NOT EDIT BELOW ** |
| ************************************/ |
| |
| #ifndef ASIC_REG_NIF_RTR_CTRL_5_REGS_H_ |
| #define ASIC_REG_NIF_RTR_CTRL_5_REGS_H_ |
| |
| /* |
| ***************************************** |
| * NIF_RTR_CTRL_5 (Prototype: RTR_CTRL) |
| ***************************************** |
| */ |
| |
| #define mmNIF_RTR_CTRL_5_PERM_SEL 0x3D6108 |
| |
| #define mmNIF_RTR_CTRL_5_HBM_POLY_H3_0 0x3D6114 |
| |
| #define mmNIF_RTR_CTRL_5_HBM_POLY_H3_1 0x3D6118 |
| |
| #define mmNIF_RTR_CTRL_5_HBM_POLY_H3_2 0x3D611C |
| |
| #define mmNIF_RTR_CTRL_5_HBM_POLY_H3_3 0x3D6120 |
| |
| #define mmNIF_RTR_CTRL_5_HBM_POLY_H3_4 0x3D6124 |
| |
| #define mmNIF_RTR_CTRL_5_HBM_POLY_H3_5 0x3D6128 |
| |
| #define mmNIF_RTR_CTRL_5_HBM_POLY_H3_6 0x3D612C |
| |
| #define mmNIF_RTR_CTRL_5_HBM_POLY_H3_7 0x3D6130 |
| |
| #define mmNIF_RTR_CTRL_5_HBM_POLY_H3_8 0x3D6134 |
| |
| #define mmNIF_RTR_CTRL_5_HBM_POLY_H3_9 0x3D6138 |
| |
| #define mmNIF_RTR_CTRL_5_HBM_POLY_H3_10 0x3D613C |
| |
| #define mmNIF_RTR_CTRL_5_HBM_POLY_H3_11 0x3D6140 |
| |
| #define mmNIF_RTR_CTRL_5_HBM_POLY_H3_12 0x3D6144 |
| |
| #define mmNIF_RTR_CTRL_5_HBM_POLY_H3_13 0x3D6148 |
| |
| #define mmNIF_RTR_CTRL_5_HBM_POLY_H3_14 0x3D614C |
| |
| #define mmNIF_RTR_CTRL_5_HBM_POLY_H3_15 0x3D6150 |
| |
| #define mmNIF_RTR_CTRL_5_HBM_POLY_H3_16 0x3D6154 |
| |
| #define mmNIF_RTR_CTRL_5_HBM_POLY_H3_17 0x3D6158 |
| |
| #define mmNIF_RTR_CTRL_5_HBM_POLY_H3_18 0x3D615C |
| |
| #define mmNIF_RTR_CTRL_5_HBM_POLY_H3_19 0x3D6160 |
| |
| #define mmNIF_RTR_CTRL_5_HBM_POLY_H3_20 0x3D6164 |
| |
| #define mmNIF_RTR_CTRL_5_HBM_POLY_H3_21 0x3D6168 |
| |
| #define mmNIF_RTR_CTRL_5_HBM_POLY_H3_22 0x3D616C |
| |
| #define mmNIF_RTR_CTRL_5_HBM_POLY_H3_23 0x3D6170 |
| |
| #define mmNIF_RTR_CTRL_5_HBM_POLY_H3_24 0x3D6174 |
| |
| #define mmNIF_RTR_CTRL_5_HBM_POLY_H3_25 0x3D6178 |
| |
| #define mmNIF_RTR_CTRL_5_HBM_POLY_H3_26 0x3D617C |
| |
| #define mmNIF_RTR_CTRL_5_HBM_POLY_H3_27 0x3D6180 |
| |
| #define mmNIF_RTR_CTRL_5_SRAM_POLY_H3_0 0x3D6184 |
| |
| #define mmNIF_RTR_CTRL_5_SRAM_POLY_H3_1 0x3D6188 |
| |
| #define mmNIF_RTR_CTRL_5_SRAM_POLY_H3_2 0x3D618C |
| |
| #define mmNIF_RTR_CTRL_5_SRAM_POLY_H3_3 0x3D6190 |
| |
| #define mmNIF_RTR_CTRL_5_SRAM_POLY_H3_4 0x3D6194 |
| |
| #define mmNIF_RTR_CTRL_5_SRAM_POLY_H3_5 0x3D6198 |
| |
| #define mmNIF_RTR_CTRL_5_SRAM_POLY_H3_6 0x3D619C |
| |
| #define mmNIF_RTR_CTRL_5_SRAM_POLY_H3_7 0x3D61A0 |
| |
| #define mmNIF_RTR_CTRL_5_SRAM_POLY_H3_8 0x3D61A4 |
| |
| #define mmNIF_RTR_CTRL_5_SRAM_POLY_H3_9 0x3D61A8 |
| |
| #define mmNIF_RTR_CTRL_5_SRAM_POLY_H3_10 0x3D61AC |
| |
| #define mmNIF_RTR_CTRL_5_SRAM_POLY_H3_11 0x3D61B0 |
| |
| #define mmNIF_RTR_CTRL_5_SRAM_POLY_H3_12 0x3D61B4 |
| |
| #define mmNIF_RTR_CTRL_5_SRAM_POLY_H3_13 0x3D61B8 |
| |
| #define mmNIF_RTR_CTRL_5_SRAM_POLY_H3_14 0x3D61BC |
| |
| #define mmNIF_RTR_CTRL_5_SCRAM_SRAM_EN 0x3D626C |
| |
| #define mmNIF_RTR_CTRL_5_RL_HBM_EN 0x3D6274 |
| |
| #define mmNIF_RTR_CTRL_5_RL_HBM_SAT 0x3D6278 |
| |
| #define mmNIF_RTR_CTRL_5_RL_HBM_RST 0x3D627C |
| |
| #define mmNIF_RTR_CTRL_5_RL_HBM_TIMEOUT 0x3D6280 |
| |
| #define mmNIF_RTR_CTRL_5_SCRAM_HBM_EN 0x3D6284 |
| |
| #define mmNIF_RTR_CTRL_5_RL_PCI_EN 0x3D6288 |
| |
| #define mmNIF_RTR_CTRL_5_RL_PCI_SAT 0x3D628C |
| |
| #define mmNIF_RTR_CTRL_5_RL_PCI_RST 0x3D6290 |
| |
| #define mmNIF_RTR_CTRL_5_RL_PCI_TIMEOUT 0x3D6294 |
| |
| #define mmNIF_RTR_CTRL_5_RL_SRAM_EN 0x3D629C |
| |
| #define mmNIF_RTR_CTRL_5_RL_SRAM_SAT 0x3D62A0 |
| |
| #define mmNIF_RTR_CTRL_5_RL_SRAM_RST 0x3D62A4 |
| |
| #define mmNIF_RTR_CTRL_5_RL_SRAM_TIMEOUT 0x3D62AC |
| |
| #define mmNIF_RTR_CTRL_5_RL_SRAM_RED 0x3D62B4 |
| |
| #define mmNIF_RTR_CTRL_5_E2E_HBM_EN 0x3D62EC |
| |
| #define mmNIF_RTR_CTRL_5_E2E_PCI_EN 0x3D62F0 |
| |
| #define mmNIF_RTR_CTRL_5_E2E_HBM_WR_SIZE 0x3D62F4 |
| |
| #define mmNIF_RTR_CTRL_5_E2E_PCI_WR_SIZE 0x3D62F8 |
| |
| #define mmNIF_RTR_CTRL_5_E2E_AW_PCI_CTR_SET_EN 0x3D6404 |
| |
| #define mmNIF_RTR_CTRL_5_E2E_AW_PCI_CTR_SET 0x3D6408 |
| |
| #define mmNIF_RTR_CTRL_5_E2E_AW_PCI_CTR_WRAP 0x3D640C |
| |
| #define mmNIF_RTR_CTRL_5_E2E_AW_PCI_CTR_CNT 0x3D6410 |
| |
| #define mmNIF_RTR_CTRL_5_E2E_AW_HBM_CTR_SET_EN 0x3D6414 |
| |
| #define mmNIF_RTR_CTRL_5_E2E_AW_HBM_CTR_SET 0x3D6418 |
| |
| #define mmNIF_RTR_CTRL_5_E2E_HBM_RD_SIZE 0x3D641C |
| |
| #define mmNIF_RTR_CTRL_5_E2E_PCI_RD_SIZE 0x3D6420 |
| |
| #define mmNIF_RTR_CTRL_5_E2E_AR_PCI_CTR_SET_EN 0x3D6424 |
| |
| #define mmNIF_RTR_CTRL_5_E2E_AR_PCI_CTR_SET 0x3D6428 |
| |
| #define mmNIF_RTR_CTRL_5_E2E_AR_PCI_CTR_WRAP 0x3D642C |
| |
| #define mmNIF_RTR_CTRL_5_E2E_AR_PCI_CTR_CNT 0x3D6430 |
| |
| #define mmNIF_RTR_CTRL_5_E2E_AR_HBM_CTR_SET_EN 0x3D6434 |
| |
| #define mmNIF_RTR_CTRL_5_E2E_AR_HBM_CTR_SET 0x3D6438 |
| |
| #define mmNIF_RTR_CTRL_5_NL_HBM_SEL_0 0x3D6450 |
| |
| #define mmNIF_RTR_CTRL_5_NL_HBM_SEL_1 0x3D6454 |
| |
| #define mmNIF_RTR_CTRL_5_NON_LIN_EN 0x3D6480 |
| |
| #define mmNIF_RTR_CTRL_5_NL_SRAM_BANK_0 0x3D6500 |
| |
| #define mmNIF_RTR_CTRL_5_NL_SRAM_BANK_1 0x3D6504 |
| |
| #define mmNIF_RTR_CTRL_5_NL_SRAM_BANK_2 0x3D6508 |
| |
| #define mmNIF_RTR_CTRL_5_NL_SRAM_BANK_3 0x3D650C |
| |
| #define mmNIF_RTR_CTRL_5_NL_SRAM_BANK_4 0x3D6510 |
| |
| #define mmNIF_RTR_CTRL_5_NL_SRAM_OFFSET_0 0x3D6514 |
| |
| #define mmNIF_RTR_CTRL_5_NL_SRAM_OFFSET_1 0x3D6520 |
| |
| #define mmNIF_RTR_CTRL_5_NL_SRAM_OFFSET_2 0x3D6524 |
| |
| #define mmNIF_RTR_CTRL_5_NL_SRAM_OFFSET_3 0x3D6528 |
| |
| #define mmNIF_RTR_CTRL_5_NL_SRAM_OFFSET_4 0x3D652C |
| |
| #define mmNIF_RTR_CTRL_5_NL_SRAM_OFFSET_5 0x3D6530 |
| |
| #define mmNIF_RTR_CTRL_5_NL_SRAM_OFFSET_6 0x3D6534 |
| |
| #define mmNIF_RTR_CTRL_5_NL_SRAM_OFFSET_7 0x3D6538 |
| |
| #define mmNIF_RTR_CTRL_5_NL_SRAM_OFFSET_8 0x3D653C |
| |
| #define mmNIF_RTR_CTRL_5_NL_SRAM_OFFSET_9 0x3D6540 |
| |
| #define mmNIF_RTR_CTRL_5_NL_HBM_OFFSET_0 0x3D6550 |
| |
| #define mmNIF_RTR_CTRL_5_NL_HBM_OFFSET_1 0x3D6554 |
| |
| #define mmNIF_RTR_CTRL_5_NL_HBM_OFFSET_2 0x3D6558 |
| |
| #define mmNIF_RTR_CTRL_5_NL_HBM_OFFSET_3 0x3D655C |
| |
| #define mmNIF_RTR_CTRL_5_NL_HBM_OFFSET_4 0x3D6560 |
| |
| #define mmNIF_RTR_CTRL_5_NL_HBM_OFFSET_5 0x3D6564 |
| |
| #define mmNIF_RTR_CTRL_5_NL_HBM_OFFSET_6 0x3D6568 |
| |
| #define mmNIF_RTR_CTRL_5_NL_HBM_OFFSET_7 0x3D656C |
| |
| #define mmNIF_RTR_CTRL_5_NL_HBM_OFFSET_8 0x3D6570 |
| |
| #define mmNIF_RTR_CTRL_5_NL_HBM_OFFSET_9 0x3D6574 |
| |
| #define mmNIF_RTR_CTRL_5_NL_HBM_OFFSET_10 0x3D6578 |
| |
| #define mmNIF_RTR_CTRL_5_NL_HBM_OFFSET_11 0x3D657C |
| |
| #define mmNIF_RTR_CTRL_5_NL_HBM_OFFSET_12 0x3D6580 |
| |
| #define mmNIF_RTR_CTRL_5_NL_HBM_OFFSET_13 0x3D6584 |
| |
| #define mmNIF_RTR_CTRL_5_NL_HBM_OFFSET_14 0x3D6588 |
| |
| #define mmNIF_RTR_CTRL_5_NL_HBM_OFFSET_15 0x3D658C |
| |
| #define mmNIF_RTR_CTRL_5_NL_HBM_OFFSET_16 0x3D6590 |
| |
| #define mmNIF_RTR_CTRL_5_NL_HBM_OFFSET_17 0x3D6594 |
| |
| #define mmNIF_RTR_CTRL_5_NL_HBM_OFFSET_18 0x3D6598 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AW_0 0x3D65E4 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AW_1 0x3D65E8 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AW_2 0x3D65EC |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AW_3 0x3D65F0 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AW_4 0x3D65F4 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AW_5 0x3D65F8 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AW_6 0x3D65FC |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AW_7 0x3D6600 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AW_8 0x3D6604 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AW_9 0x3D6608 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AW_10 0x3D660C |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AW_11 0x3D6610 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AW_12 0x3D6614 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AW_13 0x3D6618 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AW_14 0x3D661C |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AW_15 0x3D6620 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AW_0 0x3D6624 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AW_1 0x3D6628 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AW_2 0x3D662C |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AW_3 0x3D6630 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AW_4 0x3D6634 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AW_5 0x3D6638 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AW_6 0x3D663C |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AW_7 0x3D6640 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AW_8 0x3D6644 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AW_9 0x3D6648 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AW_10 0x3D664C |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AW_11 0x3D6650 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AW_12 0x3D6654 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AW_13 0x3D6658 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AW_14 0x3D665C |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AW_15 0x3D6660 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AW_0 0x3D6664 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AW_1 0x3D6668 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AW_2 0x3D666C |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AW_3 0x3D6670 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AW_4 0x3D6674 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AW_5 0x3D6678 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AW_6 0x3D667C |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AW_7 0x3D6680 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AW_8 0x3D6684 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AW_9 0x3D6688 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AW_10 0x3D668C |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AW_11 0x3D6690 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AW_12 0x3D6694 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AW_13 0x3D6698 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AW_14 0x3D669C |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AW_15 0x3D66A0 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AW_0 0x3D66A4 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AW_1 0x3D66A8 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AW_2 0x3D66AC |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AW_3 0x3D66B0 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AW_4 0x3D66B4 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AW_5 0x3D66B8 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AW_6 0x3D66BC |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AW_7 0x3D66C0 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AW_8 0x3D66C4 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AW_9 0x3D66C8 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AW_10 0x3D66CC |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AW_11 0x3D66D0 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AW_12 0x3D66D4 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AW_13 0x3D66D8 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AW_14 0x3D66DC |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AW_15 0x3D66E0 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AW_0 0x3D66E4 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AW_1 0x3D66E8 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AW_2 0x3D66EC |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AW_3 0x3D66F0 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AW_4 0x3D66F4 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AW_5 0x3D66F8 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AW_6 0x3D66FC |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AW_7 0x3D6700 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AW_8 0x3D6704 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AW_9 0x3D6708 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AW_10 0x3D670C |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AW_11 0x3D6710 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AW_12 0x3D6714 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AW_13 0x3D6718 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AW_14 0x3D671C |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AW_15 0x3D6720 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AW_0 0x3D6724 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AW_1 0x3D6728 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AW_2 0x3D672C |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AW_3 0x3D6730 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AW_4 0x3D6734 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AW_5 0x3D6738 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AW_6 0x3D673C |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AW_7 0x3D6740 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AW_8 0x3D6744 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AW_9 0x3D6748 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AW_10 0x3D674C |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AW_11 0x3D6750 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AW_12 0x3D6754 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AW_13 0x3D6758 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AW_14 0x3D675C |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AW_15 0x3D6760 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AW_0 0x3D6764 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AW_1 0x3D6768 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AW_2 0x3D676C |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AW_3 0x3D6770 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AW_4 0x3D6774 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AW_5 0x3D6778 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AW_6 0x3D677C |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AW_7 0x3D6780 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AW_8 0x3D6784 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AW_9 0x3D6788 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AW_10 0x3D678C |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AW_11 0x3D6790 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AW_12 0x3D6794 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AW_13 0x3D6798 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AW_14 0x3D679C |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AW_15 0x3D67A0 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AW_0 0x3D67A4 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AW_1 0x3D67A8 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AW_2 0x3D67AC |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AW_3 0x3D67B0 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AW_4 0x3D67B4 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AW_5 0x3D67B8 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AW_6 0x3D67BC |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AW_7 0x3D67C0 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AW_8 0x3D67C4 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AW_9 0x3D67C8 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AW_10 0x3D67CC |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AW_11 0x3D67D0 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AW_12 0x3D67D4 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AW_13 0x3D67D8 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AW_14 0x3D67DC |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AW_15 0x3D67E0 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AR_0 0x3D6824 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AR_1 0x3D6828 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AR_2 0x3D682C |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AR_3 0x3D6830 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AR_4 0x3D6834 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AR_5 0x3D6838 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AR_6 0x3D683C |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AR_7 0x3D6840 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AR_8 0x3D6844 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AR_9 0x3D6848 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AR_10 0x3D684C |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AR_11 0x3D6850 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AR_12 0x3D6854 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AR_13 0x3D6858 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AR_14 0x3D685C |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AR_15 0x3D6860 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AR_0 0x3D6864 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AR_1 0x3D6868 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AR_2 0x3D686C |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AR_3 0x3D6870 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AR_4 0x3D6874 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AR_5 0x3D6878 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AR_6 0x3D687C |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AR_7 0x3D6880 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AR_8 0x3D6884 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AR_9 0x3D6888 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AR_10 0x3D688C |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AR_11 0x3D6890 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AR_12 0x3D6894 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AR_13 0x3D6898 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AR_14 0x3D689C |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AR_15 0x3D68A0 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AR_0 0x3D68A4 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AR_1 0x3D68A8 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AR_2 0x3D68AC |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AR_3 0x3D68B0 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AR_4 0x3D68B4 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AR_5 0x3D68B8 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AR_6 0x3D68BC |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AR_7 0x3D68C0 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AR_8 0x3D68C4 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AR_9 0x3D68C8 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AR_10 0x3D68CC |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AR_11 0x3D68D0 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AR_12 0x3D68D4 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AR_13 0x3D68D8 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AR_14 0x3D68DC |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AR_15 0x3D68E0 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AR_0 0x3D68E4 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AR_1 0x3D68E8 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AR_2 0x3D68EC |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AR_3 0x3D68F0 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AR_4 0x3D68F4 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AR_5 0x3D68F8 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AR_6 0x3D68FC |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AR_7 0x3D6900 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AR_8 0x3D6904 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AR_9 0x3D6908 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AR_10 0x3D690C |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AR_11 0x3D6910 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AR_12 0x3D6914 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AR_13 0x3D6918 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AR_14 0x3D691C |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AR_15 0x3D6920 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AR_0 0x3D6924 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AR_1 0x3D6928 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AR_2 0x3D692C |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AR_3 0x3D6930 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AR_4 0x3D6934 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AR_5 0x3D6938 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AR_6 0x3D693C |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AR_7 0x3D6940 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AR_8 0x3D6944 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AR_9 0x3D6948 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AR_10 0x3D694C |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AR_11 0x3D6950 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AR_12 0x3D6954 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AR_13 0x3D6958 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AR_14 0x3D695C |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AR_15 0x3D6960 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AR_0 0x3D6964 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AR_1 0x3D6968 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AR_2 0x3D696C |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AR_3 0x3D6970 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AR_4 0x3D6974 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AR_5 0x3D6978 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AR_6 0x3D697C |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AR_7 0x3D6980 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AR_8 0x3D6984 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AR_9 0x3D6988 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AR_10 0x3D698C |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AR_11 0x3D6990 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AR_12 0x3D6994 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AR_13 0x3D6998 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AR_14 0x3D699C |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AR_15 0x3D69A0 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AR_0 0x3D69A4 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AR_1 0x3D69A8 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AR_2 0x3D69AC |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AR_3 0x3D69B0 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AR_4 0x3D69B4 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AR_5 0x3D69B8 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AR_6 0x3D69BC |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AR_7 0x3D69C0 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AR_8 0x3D69C4 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AR_9 0x3D69C8 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AR_10 0x3D69CC |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AR_11 0x3D69D0 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AR_12 0x3D69D4 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AR_13 0x3D69D8 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AR_14 0x3D69DC |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AR_15 0x3D69E0 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AR_0 0x3D69E4 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AR_1 0x3D69E8 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AR_2 0x3D69EC |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AR_3 0x3D69F0 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AR_4 0x3D69F4 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AR_5 0x3D69F8 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AR_6 0x3D69FC |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AR_7 0x3D6A00 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AR_8 0x3D6A04 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AR_9 0x3D6A08 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AR_10 0x3D6A0C |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AR_11 0x3D6A10 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AR_12 0x3D6A14 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AR_13 0x3D6A18 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AR_14 0x3D6A1C |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AR_15 0x3D6A20 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_HIT_AW 0x3D6A64 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_SEC_HIT_AR 0x3D6A68 |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_HIT_AW 0x3D6A6C |
| |
| #define mmNIF_RTR_CTRL_5_RANGE_PRIV_HIT_AR 0x3D6A70 |
| |
| #define mmNIF_RTR_CTRL_5_RGL_CFG 0x3D6B64 |
| |
| #define mmNIF_RTR_CTRL_5_RGL_SHIFT 0x3D6B68 |
| |
| #define mmNIF_RTR_CTRL_5_RGL_EXPECTED_LAT_0 0x3D6B6C |
| |
| #define mmNIF_RTR_CTRL_5_RGL_EXPECTED_LAT_1 0x3D6B70 |
| |
| #define mmNIF_RTR_CTRL_5_RGL_EXPECTED_LAT_2 0x3D6B74 |
| |
| #define mmNIF_RTR_CTRL_5_RGL_EXPECTED_LAT_3 0x3D6B78 |
| |
| #define mmNIF_RTR_CTRL_5_RGL_EXPECTED_LAT_4 0x3D6B7C |
| |
| #define mmNIF_RTR_CTRL_5_RGL_EXPECTED_LAT_5 0x3D6B80 |
| |
| #define mmNIF_RTR_CTRL_5_RGL_EXPECTED_LAT_6 0x3D6B84 |
| |
| #define mmNIF_RTR_CTRL_5_RGL_EXPECTED_LAT_7 0x3D6B88 |
| |
| #define mmNIF_RTR_CTRL_5_RGL_TOKEN_0 0x3D6BAC |
| |
| #define mmNIF_RTR_CTRL_5_RGL_TOKEN_1 0x3D6BB0 |
| |
| #define mmNIF_RTR_CTRL_5_RGL_TOKEN_2 0x3D6BB4 |
| |
| #define mmNIF_RTR_CTRL_5_RGL_TOKEN_3 0x3D6BB8 |
| |
| #define mmNIF_RTR_CTRL_5_RGL_TOKEN_4 0x3D6BBC |
| |
| #define mmNIF_RTR_CTRL_5_RGL_TOKEN_5 0x3D6BC0 |
| |
| #define mmNIF_RTR_CTRL_5_RGL_TOKEN_6 0x3D6BC4 |
| |
| #define mmNIF_RTR_CTRL_5_RGL_TOKEN_7 0x3D6BC8 |
| |
| #define mmNIF_RTR_CTRL_5_RGL_BANK_ID_0 0x3D6BEC |
| |
| #define mmNIF_RTR_CTRL_5_RGL_BANK_ID_1 0x3D6BF0 |
| |
| #define mmNIF_RTR_CTRL_5_RGL_BANK_ID_2 0x3D6BF4 |
| |
| #define mmNIF_RTR_CTRL_5_RGL_BANK_ID_3 0x3D6BF8 |
| |
| #define mmNIF_RTR_CTRL_5_RGL_BANK_ID_4 0x3D6BFC |
| |
| #define mmNIF_RTR_CTRL_5_RGL_BANK_ID_5 0x3D6C00 |
| |
| #define mmNIF_RTR_CTRL_5_RGL_BANK_ID_6 0x3D6C04 |
| |
| #define mmNIF_RTR_CTRL_5_RGL_BANK_ID_7 0x3D6C08 |
| |
| #define mmNIF_RTR_CTRL_5_RGL_WDT 0x3D6C2C |
| |
| #define mmNIF_RTR_CTRL_5_E2E_AR_HBM0_CH0_CTR_WRAP 0x3D6C30 |
| |
| #define mmNIF_RTR_CTRL_5_E2E_AR_HBM0_CH1_CTR_WRAP 0x3D6C34 |
| |
| #define mmNIF_RTR_CTRL_5_E2E_AR_HBM1_CH0_CTR_WRAP 0x3D6C38 |
| |
| #define mmNIF_RTR_CTRL_5_E2E_AR_HBM1_CH1_CTR_WRAP 0x3D6C3C |
| |
| #define mmNIF_RTR_CTRL_5_E2E_AR_HBM2_CH0_CTR_WRAP 0x3D6C40 |
| |
| #define mmNIF_RTR_CTRL_5_E2E_AR_HBM2_CH1_CTR_WRAP 0x3D6C44 |
| |
| #define mmNIF_RTR_CTRL_5_E2E_AR_HBM3_CH0_CTR_WRAP 0x3D6C48 |
| |
| #define mmNIF_RTR_CTRL_5_E2E_AR_HBM3_CH1_CTR_WRAP 0x3D6C4C |
| |
| #define mmNIF_RTR_CTRL_5_E2E_AR_HBM0_CH0_CTR_CNT 0x3D6C50 |
| |
| #define mmNIF_RTR_CTRL_5_E2E_AR_HBM0_CH1_CTR_CNT 0x3D6C54 |
| |
| #define mmNIF_RTR_CTRL_5_E2E_AR_HBM1_CH0_CTR_CNT 0x3D6C58 |
| |
| #define mmNIF_RTR_CTRL_5_E2E_AR_HBM1_CH1_CTR_CNT 0x3D6C5C |
| |
| #define mmNIF_RTR_CTRL_5_E2E_AR_HBM2_CH0_CTR_CNT 0x3D6C60 |
| |
| #define mmNIF_RTR_CTRL_5_E2E_AR_HBM2_CH1_CTR_CNT 0x3D6C64 |
| |
| #define mmNIF_RTR_CTRL_5_E2E_AR_HBM3_CH0_CTR_CNT 0x3D6C68 |
| |
| #define mmNIF_RTR_CTRL_5_E2E_AR_HBM3_CH1_CTR_CNT 0x3D6C6C |
| |
| #define mmNIF_RTR_CTRL_5_E2E_AW_HBM0_CH0_CTR_WRAP 0x3D6C70 |
| |
| #define mmNIF_RTR_CTRL_5_E2E_AW_HBM0_CH1_CTR_WRAP 0x3D6C74 |
| |
| #define mmNIF_RTR_CTRL_5_E2E_AW_HBM1_CH0_CTR_WRAP 0x3D6C78 |
| |
| #define mmNIF_RTR_CTRL_5_E2E_AW_HBM1_CH1_CTR_WRAP 0x3D6C7C |
| |
| #define mmNIF_RTR_CTRL_5_E2E_AW_HBM2_CH0_CTR_WRAP 0x3D6C80 |
| |
| #define mmNIF_RTR_CTRL_5_E2E_AW_HBM2_CH1_CTR_WRAP 0x3D6C84 |
| |
| #define mmNIF_RTR_CTRL_5_E2E_AW_HBM3_CH0_CTR_WRAP 0x3D6C88 |
| |
| #define mmNIF_RTR_CTRL_5_E2E_AW_HBM3_CH1_CTR_WRAP 0x3D6C8C |
| |
| #define mmNIF_RTR_CTRL_5_E2E_AW_HBM0_CH0_CTR_CNT 0x3D6C90 |
| |
| #define mmNIF_RTR_CTRL_5_E2E_AW_HBM0_CH1_CTR_CNT 0x3D6C94 |
| |
| #define mmNIF_RTR_CTRL_5_E2E_AW_HBM1_CH0_CTR_CNT 0x3D6C98 |
| |
| #define mmNIF_RTR_CTRL_5_E2E_AW_HBM1_CH1_CTR_CNT 0x3D6C9C |
| |
| #define mmNIF_RTR_CTRL_5_E2E_AW_HBM2_CH0_CTR_CNT 0x3D6CA0 |
| |
| #define mmNIF_RTR_CTRL_5_E2E_AW_HBM2_CH1_CTR_CNT 0x3D6CA4 |
| |
| #define mmNIF_RTR_CTRL_5_E2E_AW_HBM3_CH0_CTR_CNT 0x3D6CA8 |
| |
| #define mmNIF_RTR_CTRL_5_E2E_AW_HBM3_CH1_CTR_CNT 0x3D6CAC |
| |
| #define mmNIF_RTR_CTRL_5_NL_HBM_PC_SEL_0 0x3D6CB0 |
| |
| #define mmNIF_RTR_CTRL_5_NL_HBM_PC_SEL_1 0x3D6CB4 |
| |
| #define mmNIF_RTR_CTRL_5_NL_HBM_PC_SEL_2 0x3D6CB8 |
| |
| #define mmNIF_RTR_CTRL_5_NL_HBM_PC_SEL_3 0x3D6CBC |
| |
| #endif /* ASIC_REG_NIF_RTR_CTRL_5_REGS_H_ */ |
