| /* SPDX-License-Identifier: GPL-2.0 |
| * |
| * Copyright 2016-2018 HabanaLabs, Ltd. |
| * All Rights Reserved. |
| * |
| */ |
| |
| /************************************ |
| ** This is an auto-generated file ** |
| ** DO NOT EDIT BELOW ** |
| ************************************/ |
| |
| #ifndef ASIC_REG_PSOC_HBM_PLL_REGS_H_ |
| #define ASIC_REG_PSOC_HBM_PLL_REGS_H_ |
| |
| /* |
| ***************************************** |
| * PSOC_HBM_PLL (Prototype: PLL) |
| ***************************************** |
| */ |
| |
| #define mmPSOC_HBM_PLL_NR 0xC74100 |
| |
| #define mmPSOC_HBM_PLL_NF 0xC74104 |
| |
| #define mmPSOC_HBM_PLL_OD 0xC74108 |
| |
| #define mmPSOC_HBM_PLL_NB 0xC7410C |
| |
| #define mmPSOC_HBM_PLL_CFG 0xC74110 |
| |
| #define mmPSOC_HBM_PLL_LOSE_MASK 0xC74120 |
| |
| #define mmPSOC_HBM_PLL_LOCK_INTR 0xC74128 |
| |
| #define mmPSOC_HBM_PLL_LOCK_BYPASS 0xC7412C |
| |
| #define mmPSOC_HBM_PLL_DATA_CHNG 0xC74130 |
| |
| #define mmPSOC_HBM_PLL_RST 0xC74134 |
| |
| #define mmPSOC_HBM_PLL_SLIP_WD_CNTR 0xC74150 |
| |
| #define mmPSOC_HBM_PLL_DIV_FACTOR_0 0xC74200 |
| |
| #define mmPSOC_HBM_PLL_DIV_FACTOR_1 0xC74204 |
| |
| #define mmPSOC_HBM_PLL_DIV_FACTOR_2 0xC74208 |
| |
| #define mmPSOC_HBM_PLL_DIV_FACTOR_3 0xC7420C |
| |
| #define mmPSOC_HBM_PLL_DIV_FACTOR_CMD_0 0xC74220 |
| |
| #define mmPSOC_HBM_PLL_DIV_FACTOR_CMD_1 0xC74224 |
| |
| #define mmPSOC_HBM_PLL_DIV_FACTOR_CMD_2 0xC74228 |
| |
| #define mmPSOC_HBM_PLL_DIV_FACTOR_CMD_3 0xC7422C |
| |
| #define mmPSOC_HBM_PLL_DIV_SEL_0 0xC74280 |
| |
| #define mmPSOC_HBM_PLL_DIV_SEL_1 0xC74284 |
| |
| #define mmPSOC_HBM_PLL_DIV_SEL_2 0xC74288 |
| |
| #define mmPSOC_HBM_PLL_DIV_SEL_3 0xC7428C |
| |
| #define mmPSOC_HBM_PLL_DIV_EN_0 0xC742A0 |
| |
| #define mmPSOC_HBM_PLL_DIV_EN_1 0xC742A4 |
| |
| #define mmPSOC_HBM_PLL_DIV_EN_2 0xC742A8 |
| |
| #define mmPSOC_HBM_PLL_DIV_EN_3 0xC742AC |
| |
| #define mmPSOC_HBM_PLL_DIV_FACTOR_BUSY_0 0xC742C0 |
| |
| #define mmPSOC_HBM_PLL_DIV_FACTOR_BUSY_1 0xC742C4 |
| |
| #define mmPSOC_HBM_PLL_DIV_FACTOR_BUSY_2 0xC742C8 |
| |
| #define mmPSOC_HBM_PLL_DIV_FACTOR_BUSY_3 0xC742CC |
| |
| #define mmPSOC_HBM_PLL_CLK_GATER 0xC74300 |
| |
| #define mmPSOC_HBM_PLL_CLK_RLX_0 0xC74310 |
| |
| #define mmPSOC_HBM_PLL_CLK_RLX_1 0xC74314 |
| |
| #define mmPSOC_HBM_PLL_CLK_RLX_2 0xC74318 |
| |
| #define mmPSOC_HBM_PLL_CLK_RLX_3 0xC7431C |
| |
| #define mmPSOC_HBM_PLL_REF_CNTR_PERIOD 0xC74400 |
| |
| #define mmPSOC_HBM_PLL_REF_LOW_THRESHOLD 0xC74410 |
| |
| #define mmPSOC_HBM_PLL_REF_HIGH_THRESHOLD 0xC74420 |
| |
| #define mmPSOC_HBM_PLL_PLL_NOT_STABLE 0xC74430 |
| |
| #define mmPSOC_HBM_PLL_FREQ_CALC_EN 0xC74440 |
| |
| #define mmPSOC_HBM_PLL_RLX_BITMAP_CFG 0xC74500 |
| |
| #define mmPSOC_HBM_PLL_RLX_BITMAP_0 0xC74510 |
| |
| #define mmPSOC_HBM_PLL_RLX_BITMAP_1 0xC74514 |
| |
| #define mmPSOC_HBM_PLL_RLX_BITMAP_2 0xC74518 |
| |
| #define mmPSOC_HBM_PLL_RLX_BITMAP_3 0xC7451C |
| |
| #endif /* ASIC_REG_PSOC_HBM_PLL_REGS_H_ */ |