| // SPDX-License-Identifier: GPL-2.0 |
| /dts-v1/; |
| |
| #include <dt-bindings/input/linux-event-codes.h> |
| #include <dt-bindings/input/gpio-keys.h> |
| |
| #include "tegra186-p3310.dtsi" |
| |
| / { |
| model = "NVIDIA Jetson TX2 Developer Kit"; |
| compatible = "nvidia,p2771-0000", "nvidia,tegra186"; |
| |
| aconnect@2900000 { |
| status = "okay"; |
| |
| ahub@2900800 { |
| status = "okay"; |
| |
| i2s@2901000 { |
| status = "okay"; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@0 { |
| reg = <0>; |
| |
| i2s1_cif_ep: endpoint { |
| remote-endpoint = <&xbar_i2s1_ep>; |
| }; |
| }; |
| |
| i2s1_port: port@1 { |
| reg = <1>; |
| |
| i2s1_dap_ep: endpoint { |
| dai-format = "i2s"; |
| /* Placeholder for external Codec */ |
| }; |
| }; |
| }; |
| }; |
| |
| i2s@2901100 { |
| status = "okay"; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@0 { |
| reg = <0>; |
| |
| i2s2_cif_ep: endpoint { |
| remote-endpoint = <&xbar_i2s2_ep>; |
| }; |
| }; |
| |
| i2s2_port: port@1 { |
| reg = <1>; |
| |
| i2s2_dap_ep: endpoint { |
| dai-format = "i2s"; |
| /* Placeholder for external Codec */ |
| }; |
| }; |
| }; |
| }; |
| |
| i2s@2901200 { |
| status = "okay"; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@0 { |
| reg = <0>; |
| |
| i2s3_cif_ep: endpoint { |
| remote-endpoint = <&xbar_i2s3_ep>; |
| }; |
| }; |
| |
| i2s3_port: port@1 { |
| reg = <1>; |
| |
| i2s3_dap_ep: endpoint { |
| dai-format = "i2s"; |
| /* Placeholder for external Codec */ |
| }; |
| }; |
| }; |
| }; |
| |
| i2s@2901300 { |
| status = "okay"; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@0 { |
| reg = <0>; |
| |
| i2s4_cif_ep: endpoint { |
| remote-endpoint = <&xbar_i2s4_ep>; |
| }; |
| }; |
| |
| i2s4_port: port@1 { |
| reg = <1>; |
| |
| i2s4_dap_ep: endpoint { |
| dai-format = "i2s"; |
| /* Placeholder for external Codec */ |
| }; |
| }; |
| }; |
| }; |
| |
| i2s@2901400 { |
| status = "okay"; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@0 { |
| reg = <0>; |
| |
| i2s5_cif_ep: endpoint { |
| remote-endpoint = <&xbar_i2s5_ep>; |
| }; |
| }; |
| |
| i2s5_port: port@1 { |
| reg = <1>; |
| |
| i2s5_dap_ep: endpoint { |
| dai-format = "i2s"; |
| /* Placeholder for external Codec */ |
| }; |
| }; |
| }; |
| }; |
| |
| i2s@2901500 { |
| status = "okay"; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@0 { |
| reg = <0>; |
| |
| i2s6_cif_ep: endpoint { |
| remote-endpoint = <&xbar_i2s6_ep>; |
| }; |
| }; |
| |
| i2s6_port: port@1 { |
| reg = <1>; |
| |
| i2s6_dap_ep: endpoint { |
| dai-format = "i2s"; |
| /* Placeholder for external Codec */ |
| }; |
| }; |
| }; |
| }; |
| |
| sfc@2902000 { |
| status = "okay"; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@0 { |
| reg = <0>; |
| |
| sfc1_cif_in_ep: endpoint { |
| remote-endpoint = <&xbar_sfc1_in_ep>; |
| convert-rate = <44100>; |
| }; |
| }; |
| |
| sfc1_out_port: port@1 { |
| reg = <1>; |
| |
| sfc1_cif_out_ep: endpoint { |
| remote-endpoint = <&xbar_sfc1_out_ep>; |
| convert-rate = <48000>; |
| }; |
| }; |
| }; |
| }; |
| |
| sfc@2902200 { |
| status = "okay"; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@0 { |
| reg = <0>; |
| |
| sfc2_cif_in_ep: endpoint { |
| remote-endpoint = <&xbar_sfc2_in_ep>; |
| }; |
| }; |
| |
| sfc2_out_port: port@1 { |
| reg = <1>; |
| |
| sfc2_cif_out_ep: endpoint { |
| remote-endpoint = <&xbar_sfc2_out_ep>; |
| }; |
| }; |
| }; |
| }; |
| |
| sfc@2902400 { |
| status = "okay"; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@0 { |
| reg = <0>; |
| |
| sfc3_cif_in_ep: endpoint { |
| remote-endpoint = <&xbar_sfc3_in_ep>; |
| }; |
| }; |
| |
| sfc3_out_port: port@1 { |
| reg = <1>; |
| |
| sfc3_cif_out_ep: endpoint { |
| remote-endpoint = <&xbar_sfc3_out_ep>; |
| }; |
| }; |
| }; |
| }; |
| |
| sfc@2902600 { |
| status = "okay"; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@0 { |
| reg = <0>; |
| |
| sfc4_cif_in_ep: endpoint { |
| remote-endpoint = <&xbar_sfc4_in_ep>; |
| }; |
| }; |
| |
| sfc4_out_port: port@1 { |
| reg = <1>; |
| |
| sfc4_cif_out_ep: endpoint { |
| remote-endpoint = <&xbar_sfc4_out_ep>; |
| }; |
| }; |
| }; |
| }; |
| |
| amx@2903000 { |
| status = "okay"; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@0 { |
| reg = <0>; |
| |
| amx1_in1_ep: endpoint { |
| remote-endpoint = <&xbar_amx1_in1_ep>; |
| }; |
| }; |
| |
| port@1 { |
| reg = <1>; |
| |
| amx1_in2_ep: endpoint { |
| remote-endpoint = <&xbar_amx1_in2_ep>; |
| }; |
| }; |
| |
| port@2 { |
| reg = <2>; |
| |
| amx1_in3_ep: endpoint { |
| remote-endpoint = <&xbar_amx1_in3_ep>; |
| }; |
| }; |
| |
| port@3 { |
| reg = <3>; |
| |
| amx1_in4_ep: endpoint { |
| remote-endpoint = <&xbar_amx1_in4_ep>; |
| }; |
| }; |
| |
| amx1_out_port: port@4 { |
| reg = <4>; |
| |
| amx1_out_ep: endpoint { |
| remote-endpoint = <&xbar_amx1_out_ep>; |
| }; |
| }; |
| }; |
| }; |
| |
| amx@2903100 { |
| status = "okay"; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@0 { |
| reg = <0>; |
| |
| amx2_in1_ep: endpoint { |
| remote-endpoint = <&xbar_amx2_in1_ep>; |
| }; |
| }; |
| |
| port@1 { |
| reg = <1>; |
| |
| amx2_in2_ep: endpoint { |
| remote-endpoint = <&xbar_amx2_in2_ep>; |
| }; |
| }; |
| |
| amx2_in3_port: port@2 { |
| reg = <2>; |
| |
| amx2_in3_ep: endpoint { |
| remote-endpoint = <&xbar_amx2_in3_ep>; |
| }; |
| }; |
| |
| amx2_in4_port: port@3 { |
| reg = <3>; |
| |
| amx2_in4_ep: endpoint { |
| remote-endpoint = <&xbar_amx2_in4_ep>; |
| }; |
| }; |
| |
| amx2_out_port: port@4 { |
| reg = <4>; |
| |
| amx2_out_ep: endpoint { |
| remote-endpoint = <&xbar_amx2_out_ep>; |
| }; |
| }; |
| }; |
| }; |
| |
| amx@2903200 { |
| status = "okay"; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@0 { |
| reg = <0>; |
| |
| amx3_in1_ep: endpoint { |
| remote-endpoint = <&xbar_amx3_in1_ep>; |
| }; |
| }; |
| |
| port@1 { |
| reg = <1>; |
| |
| amx3_in2_ep: endpoint { |
| remote-endpoint = <&xbar_amx3_in2_ep>; |
| }; |
| }; |
| |
| port@2 { |
| reg = <2>; |
| |
| amx3_in3_ep: endpoint { |
| remote-endpoint = <&xbar_amx3_in3_ep>; |
| }; |
| }; |
| |
| port@3 { |
| reg = <3>; |
| |
| amx3_in4_ep: endpoint { |
| remote-endpoint = <&xbar_amx3_in4_ep>; |
| }; |
| }; |
| |
| amx3_out_port: port@4 { |
| reg = <4>; |
| |
| amx3_out_ep: endpoint { |
| remote-endpoint = <&xbar_amx3_out_ep>; |
| }; |
| }; |
| }; |
| }; |
| |
| amx@2903300 { |
| status = "okay"; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@0 { |
| reg = <0>; |
| |
| amx4_in1_ep: endpoint { |
| remote-endpoint = <&xbar_amx4_in1_ep>; |
| }; |
| }; |
| |
| port@1 { |
| reg = <1>; |
| |
| amx4_in2_ep: endpoint { |
| remote-endpoint = <&xbar_amx4_in2_ep>; |
| }; |
| }; |
| |
| port@2 { |
| reg = <2>; |
| |
| amx4_in3_ep: endpoint { |
| remote-endpoint = <&xbar_amx4_in3_ep>; |
| }; |
| }; |
| |
| port@3 { |
| reg = <3>; |
| |
| amx4_in4_ep: endpoint { |
| remote-endpoint = <&xbar_amx4_in4_ep>; |
| }; |
| }; |
| |
| amx4_out_port: port@4 { |
| reg = <4>; |
| |
| amx4_out_ep: endpoint { |
| remote-endpoint = <&xbar_amx4_out_ep>; |
| }; |
| }; |
| }; |
| }; |
| |
| adx@2903800 { |
| status = "okay"; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@0 { |
| reg = <0>; |
| |
| adx1_in_ep: endpoint { |
| remote-endpoint = <&xbar_adx1_in_ep>; |
| }; |
| }; |
| |
| adx1_out1_port: port@1 { |
| reg = <1>; |
| |
| adx1_out1_ep: endpoint { |
| remote-endpoint = <&xbar_adx1_out1_ep>; |
| }; |
| }; |
| |
| adx1_out2_port: port@2 { |
| reg = <2>; |
| |
| adx1_out2_ep: endpoint { |
| remote-endpoint = <&xbar_adx1_out2_ep>; |
| }; |
| }; |
| |
| adx1_out3_port: port@3 { |
| reg = <3>; |
| |
| adx1_out3_ep: endpoint { |
| remote-endpoint = <&xbar_adx1_out3_ep>; |
| }; |
| }; |
| |
| adx1_out4_port: port@4 { |
| reg = <4>; |
| |
| adx1_out4_ep: endpoint { |
| remote-endpoint = <&xbar_adx1_out4_ep>; |
| }; |
| }; |
| }; |
| }; |
| |
| adx@2903900 { |
| status = "okay"; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@0 { |
| reg = <0>; |
| |
| adx2_in_ep: endpoint { |
| remote-endpoint = <&xbar_adx2_in_ep>; |
| }; |
| }; |
| |
| adx2_out1_port: port@1 { |
| reg = <1>; |
| |
| adx2_out1_ep: endpoint { |
| remote-endpoint = <&xbar_adx2_out1_ep>; |
| }; |
| }; |
| |
| adx2_out2_port: port@2 { |
| reg = <2>; |
| |
| adx2_out2_ep: endpoint { |
| remote-endpoint = <&xbar_adx2_out2_ep>; |
| }; |
| }; |
| |
| adx2_out3_port: port@3 { |
| reg = <3>; |
| |
| adx2_out3_ep: endpoint { |
| remote-endpoint = <&xbar_adx2_out3_ep>; |
| }; |
| }; |
| |
| adx2_out4_port: port@4 { |
| reg = <4>; |
| |
| adx2_out4_ep: endpoint { |
| remote-endpoint = <&xbar_adx2_out4_ep>; |
| }; |
| }; |
| }; |
| }; |
| |
| adx@2903a00 { |
| status = "okay"; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@0 { |
| reg = <0>; |
| |
| adx3_in_ep: endpoint { |
| remote-endpoint = <&xbar_adx3_in_ep>; |
| }; |
| }; |
| |
| adx3_out1_port: port@1 { |
| reg = <1>; |
| |
| adx3_out1_ep: endpoint { |
| remote-endpoint = <&xbar_adx3_out1_ep>; |
| }; |
| }; |
| |
| adx3_out2_port: port@2 { |
| reg = <2>; |
| |
| adx3_out2_ep: endpoint { |
| remote-endpoint = <&xbar_adx3_out2_ep>; |
| }; |
| }; |
| |
| adx3_out3_port: port@3 { |
| reg = <3>; |
| |
| adx3_out3_ep: endpoint { |
| remote-endpoint = <&xbar_adx3_out3_ep>; |
| }; |
| }; |
| |
| adx3_out4_port: port@4 { |
| reg = <4>; |
| |
| adx3_out4_ep: endpoint { |
| remote-endpoint = <&xbar_adx3_out4_ep>; |
| }; |
| }; |
| }; |
| }; |
| |
| adx@2903b00 { |
| status = "okay"; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@0 { |
| reg = <0>; |
| |
| adx4_in_ep: endpoint { |
| remote-endpoint = <&xbar_adx4_in_ep>; |
| }; |
| }; |
| |
| adx4_out1_port: port@1 { |
| reg = <1>; |
| |
| adx4_out1_ep: endpoint { |
| remote-endpoint = <&xbar_adx4_out1_ep>; |
| }; |
| }; |
| |
| adx4_out2_port: port@2 { |
| reg = <2>; |
| |
| adx4_out2_ep: endpoint { |
| remote-endpoint = <&xbar_adx4_out2_ep>; |
| }; |
| }; |
| |
| adx4_out3_port: port@3 { |
| reg = <3>; |
| |
| adx4_out3_ep: endpoint { |
| remote-endpoint = <&xbar_adx4_out3_ep>; |
| }; |
| }; |
| |
| adx4_out4_port: port@4 { |
| reg = <4>; |
| |
| adx4_out4_ep: endpoint { |
| remote-endpoint = <&xbar_adx4_out4_ep>; |
| }; |
| }; |
| }; |
| }; |
| |
| dmic@2904000 { |
| status = "okay"; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@0 { |
| reg = <0>; |
| |
| dmic1_cif_ep: endpoint { |
| remote-endpoint = <&xbar_dmic1_ep>; |
| }; |
| }; |
| |
| dmic1_port: port@1 { |
| reg = <1>; |
| |
| dmic1_dap_ep: endpoint { |
| /* Place holder for external Codec */ |
| }; |
| }; |
| }; |
| }; |
| |
| dmic@2904100 { |
| status = "okay"; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@0 { |
| reg = <0>; |
| |
| dmic2_cif_ep: endpoint { |
| remote-endpoint = <&xbar_dmic2_ep>; |
| }; |
| }; |
| |
| dmic2_port: port@1 { |
| reg = <1>; |
| |
| dmic2_dap_ep: endpoint { |
| /* Place holder for external Codec */ |
| }; |
| }; |
| }; |
| }; |
| |
| dmic@2904200 { |
| status = "okay"; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@0 { |
| reg = <0>; |
| |
| dmic3_cif_ep: endpoint { |
| remote-endpoint = <&xbar_dmic3_ep>; |
| }; |
| }; |
| |
| dmic3_port: port@1 { |
| reg = <1>; |
| |
| dmic3_dap_ep: endpoint { |
| /* Place holder for external Codec */ |
| }; |
| }; |
| }; |
| }; |
| |
| dspk@2905000 { |
| status = "okay"; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@0 { |
| reg = <0>; |
| |
| dspk1_cif_ep: endpoint { |
| remote-endpoint = <&xbar_dspk1_ep>; |
| }; |
| }; |
| |
| dspk1_port: port@1 { |
| reg = <1>; |
| |
| dspk1_dap_ep: endpoint { |
| /* Place holder for external Codec */ |
| }; |
| }; |
| }; |
| }; |
| |
| dspk@2905100 { |
| status = "okay"; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@0 { |
| reg = <0>; |
| |
| dspk2_cif_ep: endpoint { |
| remote-endpoint = <&xbar_dspk2_ep>; |
| }; |
| }; |
| |
| dspk2_port: port@1 { |
| reg = <1>; |
| |
| dspk2_dap_ep: endpoint { |
| /* Place holder for external Codec */ |
| }; |
| }; |
| }; |
| }; |
| |
| processing-engine@2908000 { |
| status = "okay"; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@0 { |
| reg = <0x0>; |
| |
| ope1_cif_in_ep: endpoint { |
| remote-endpoint = <&xbar_ope1_in_ep>; |
| }; |
| }; |
| |
| ope1_out_port: port@1 { |
| reg = <0x1>; |
| |
| ope1_cif_out_ep: endpoint { |
| remote-endpoint = <&xbar_ope1_out_ep>; |
| }; |
| }; |
| }; |
| }; |
| |
| mvc@290a000 { |
| status = "okay"; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@0 { |
| reg = <0>; |
| |
| mvc1_cif_in_ep: endpoint { |
| remote-endpoint = <&xbar_mvc1_in_ep>; |
| }; |
| }; |
| |
| mvc1_out_port: port@1 { |
| reg = <1>; |
| |
| mvc1_cif_out_ep: endpoint { |
| remote-endpoint = <&xbar_mvc1_out_ep>; |
| }; |
| }; |
| }; |
| }; |
| |
| mvc@290a200 { |
| status = "okay"; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@0 { |
| reg = <0>; |
| |
| mvc2_cif_in_ep: endpoint { |
| remote-endpoint = <&xbar_mvc2_in_ep>; |
| }; |
| }; |
| |
| mvc2_out_port: port@1 { |
| reg = <1>; |
| |
| mvc2_cif_out_ep: endpoint { |
| remote-endpoint = <&xbar_mvc2_out_ep>; |
| }; |
| }; |
| }; |
| }; |
| |
| amixer@290bb00 { |
| status = "okay"; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@0 { |
| reg = <0x0>; |
| |
| mixer_in1_ep: endpoint { |
| remote-endpoint = <&xbar_mixer_in1_ep>; |
| }; |
| }; |
| |
| port@1 { |
| reg = <0x1>; |
| |
| mixer_in2_ep: endpoint { |
| remote-endpoint = <&xbar_mixer_in2_ep>; |
| }; |
| }; |
| |
| port@2 { |
| reg = <0x2>; |
| |
| mixer_in3_ep: endpoint { |
| remote-endpoint = <&xbar_mixer_in3_ep>; |
| }; |
| }; |
| |
| port@3 { |
| reg = <0x3>; |
| |
| mixer_in4_ep: endpoint { |
| remote-endpoint = <&xbar_mixer_in4_ep>; |
| }; |
| }; |
| |
| port@4 { |
| reg = <0x4>; |
| |
| mixer_in5_ep: endpoint { |
| remote-endpoint = <&xbar_mixer_in5_ep>; |
| }; |
| }; |
| |
| port@5 { |
| reg = <0x5>; |
| |
| mixer_in6_ep: endpoint { |
| remote-endpoint = <&xbar_mixer_in6_ep>; |
| }; |
| }; |
| |
| port@6 { |
| reg = <0x6>; |
| |
| mixer_in7_ep: endpoint { |
| remote-endpoint = <&xbar_mixer_in7_ep>; |
| }; |
| }; |
| |
| port@7 { |
| reg = <0x7>; |
| |
| mixer_in8_ep: endpoint { |
| remote-endpoint = <&xbar_mixer_in8_ep>; |
| }; |
| }; |
| |
| port@8 { |
| reg = <0x8>; |
| |
| mixer_in9_ep: endpoint { |
| remote-endpoint = <&xbar_mixer_in9_ep>; |
| }; |
| }; |
| |
| port@9 { |
| reg = <0x9>; |
| |
| mixer_in10_ep: endpoint { |
| remote-endpoint = <&xbar_mixer_in10_ep>; |
| }; |
| }; |
| |
| mixer_out1_port: port@a { |
| reg = <0xa>; |
| |
| mixer_out1_ep: endpoint { |
| remote-endpoint = <&xbar_mixer_out1_ep>; |
| }; |
| }; |
| |
| mixer_out2_port: port@b { |
| reg = <0xb>; |
| |
| mixer_out2_ep: endpoint { |
| remote-endpoint = <&xbar_mixer_out2_ep>; |
| }; |
| }; |
| |
| mixer_out3_port: port@c { |
| reg = <0xc>; |
| |
| mixer_out3_ep: endpoint { |
| remote-endpoint = <&xbar_mixer_out3_ep>; |
| }; |
| }; |
| |
| mixer_out4_port: port@d { |
| reg = <0xd>; |
| |
| mixer_out4_ep: endpoint { |
| remote-endpoint = <&xbar_mixer_out4_ep>; |
| }; |
| }; |
| |
| mixer_out5_port: port@e { |
| reg = <0xe>; |
| |
| mixer_out5_ep: endpoint { |
| remote-endpoint = <&xbar_mixer_out5_ep>; |
| }; |
| }; |
| }; |
| }; |
| |
| admaif@290f000 { |
| status = "okay"; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| admaif0_port: port@0 { |
| reg = <0x0>; |
| |
| admaif0_ep: endpoint { |
| remote-endpoint = <&xbar_admaif0_ep>; |
| }; |
| }; |
| |
| admaif1_port: port@1 { |
| reg = <0x1>; |
| |
| admaif1_ep: endpoint { |
| remote-endpoint = <&xbar_admaif1_ep>; |
| }; |
| }; |
| |
| admaif2_port: port@2 { |
| reg = <0x2>; |
| |
| admaif2_ep: endpoint { |
| remote-endpoint = <&xbar_admaif2_ep>; |
| }; |
| }; |
| |
| admaif3_port: port@3 { |
| reg = <0x3>; |
| |
| admaif3_ep: endpoint { |
| remote-endpoint = <&xbar_admaif3_ep>; |
| }; |
| }; |
| |
| admaif4_port: port@4 { |
| reg = <0x4>; |
| |
| admaif4_ep: endpoint { |
| remote-endpoint = <&xbar_admaif4_ep>; |
| }; |
| }; |
| |
| admaif5_port: port@5 { |
| reg = <0x5>; |
| |
| admaif5_ep: endpoint { |
| remote-endpoint = <&xbar_admaif5_ep>; |
| }; |
| }; |
| |
| admaif6_port: port@6 { |
| reg = <0x6>; |
| |
| admaif6_ep: endpoint { |
| remote-endpoint = <&xbar_admaif6_ep>; |
| }; |
| }; |
| |
| admaif7_port: port@7 { |
| reg = <0x7>; |
| |
| admaif7_ep: endpoint { |
| remote-endpoint = <&xbar_admaif7_ep>; |
| }; |
| }; |
| |
| admaif8_port: port@8 { |
| reg = <0x8>; |
| |
| admaif8_ep: endpoint { |
| remote-endpoint = <&xbar_admaif8_ep>; |
| }; |
| }; |
| |
| admaif9_port: port@9 { |
| reg = <0x9>; |
| |
| admaif9_ep: endpoint { |
| remote-endpoint = <&xbar_admaif9_ep>; |
| }; |
| }; |
| |
| admaif10_port: port@a { |
| reg = <0xa>; |
| |
| admaif10_ep: endpoint { |
| remote-endpoint = <&xbar_admaif10_ep>; |
| }; |
| }; |
| |
| admaif11_port: port@b { |
| reg = <0xb>; |
| |
| admaif11_ep: endpoint { |
| remote-endpoint = <&xbar_admaif11_ep>; |
| }; |
| }; |
| |
| admaif12_port: port@c { |
| reg = <0xc>; |
| |
| admaif12_ep: endpoint { |
| remote-endpoint = <&xbar_admaif12_ep>; |
| }; |
| }; |
| |
| admaif13_port: port@d { |
| reg = <0xd>; |
| |
| admaif13_ep: endpoint { |
| remote-endpoint = <&xbar_admaif13_ep>; |
| }; |
| }; |
| |
| admaif14_port: port@e { |
| reg = <0xe>; |
| |
| admaif14_ep: endpoint { |
| remote-endpoint = <&xbar_admaif14_ep>; |
| }; |
| }; |
| |
| admaif15_port: port@f { |
| reg = <0xf>; |
| |
| admaif15_ep: endpoint { |
| remote-endpoint = <&xbar_admaif15_ep>; |
| }; |
| }; |
| |
| admaif16_port: port@10 { |
| reg = <0x10>; |
| |
| admaif16_ep: endpoint { |
| remote-endpoint = <&xbar_admaif16_ep>; |
| }; |
| }; |
| |
| admaif17_port: port@11 { |
| reg = <0x11>; |
| |
| admaif17_ep: endpoint { |
| remote-endpoint = <&xbar_admaif17_ep>; |
| }; |
| }; |
| |
| admaif18_port: port@12 { |
| reg = <0x12>; |
| |
| admaif18_ep: endpoint { |
| remote-endpoint = <&xbar_admaif18_ep>; |
| }; |
| }; |
| |
| admaif19_port: port@13 { |
| reg = <0x13>; |
| |
| admaif19_ep: endpoint { |
| remote-endpoint = <&xbar_admaif19_ep>; |
| }; |
| }; |
| }; |
| }; |
| |
| asrc@2910000 { |
| status = "okay"; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@0 { |
| reg = <0x0>; |
| |
| asrc_in1_ep: endpoint { |
| remote-endpoint = <&xbar_asrc_in1_ep>; |
| }; |
| }; |
| |
| port@1 { |
| reg = <0x1>; |
| |
| asrc_in2_ep: endpoint { |
| remote-endpoint = <&xbar_asrc_in2_ep>; |
| }; |
| }; |
| |
| port@2 { |
| reg = <0x2>; |
| |
| asrc_in3_ep: endpoint { |
| remote-endpoint = <&xbar_asrc_in3_ep>; |
| }; |
| }; |
| |
| port@3 { |
| reg = <0x3>; |
| |
| asrc_in4_ep: endpoint { |
| remote-endpoint = <&xbar_asrc_in4_ep>; |
| }; |
| }; |
| |
| port@4 { |
| reg = <0x4>; |
| |
| asrc_in5_ep: endpoint { |
| remote-endpoint = <&xbar_asrc_in5_ep>; |
| }; |
| }; |
| |
| port@5 { |
| reg = <0x5>; |
| |
| asrc_in6_ep: endpoint { |
| remote-endpoint = <&xbar_asrc_in6_ep>; |
| }; |
| }; |
| |
| port@6 { |
| reg = <0x6>; |
| |
| asrc_in7_ep: endpoint { |
| remote-endpoint = <&xbar_asrc_in7_ep>; |
| }; |
| }; |
| |
| asrc_out1_port: port@7 { |
| reg = <0x7>; |
| |
| asrc_out1_ep: endpoint { |
| remote-endpoint = <&xbar_asrc_out1_ep>; |
| }; |
| }; |
| |
| asrc_out2_port: port@8 { |
| reg = <0x8>; |
| |
| asrc_out2_ep: endpoint { |
| remote-endpoint = <&xbar_asrc_out2_ep>; |
| }; |
| }; |
| |
| asrc_out3_port: port@9 { |
| reg = <0x9>; |
| |
| asrc_out3_ep: endpoint { |
| remote-endpoint = <&xbar_asrc_out3_ep>; |
| }; |
| }; |
| |
| asrc_out4_port: port@a { |
| reg = <0xa>; |
| |
| asrc_out4_ep: endpoint { |
| remote-endpoint = <&xbar_asrc_out4_ep>; |
| }; |
| }; |
| |
| asrc_out5_port: port@b { |
| reg = <0xb>; |
| |
| asrc_out5_ep: endpoint { |
| remote-endpoint = <&xbar_asrc_out5_ep>; |
| }; |
| }; |
| |
| asrc_out6_port: port@c { |
| reg = <0xc>; |
| |
| asrc_out6_ep: endpoint { |
| remote-endpoint = <&xbar_asrc_out6_ep>; |
| }; |
| }; |
| }; |
| }; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@0 { |
| reg = <0x0>; |
| |
| xbar_admaif0_ep: endpoint { |
| remote-endpoint = <&admaif0_ep>; |
| }; |
| }; |
| |
| port@1 { |
| reg = <0x1>; |
| |
| xbar_admaif1_ep: endpoint { |
| remote-endpoint = <&admaif1_ep>; |
| }; |
| }; |
| |
| port@2 { |
| reg = <0x2>; |
| |
| xbar_admaif2_ep: endpoint { |
| remote-endpoint = <&admaif2_ep>; |
| }; |
| }; |
| |
| port@3 { |
| reg = <0x3>; |
| |
| xbar_admaif3_ep: endpoint { |
| remote-endpoint = <&admaif3_ep>; |
| }; |
| }; |
| |
| port@4 { |
| reg = <0x4>; |
| |
| xbar_admaif4_ep: endpoint { |
| remote-endpoint = <&admaif4_ep>; |
| }; |
| }; |
| |
| port@5 { |
| reg = <0x5>; |
| |
| xbar_admaif5_ep: endpoint { |
| remote-endpoint = <&admaif5_ep>; |
| }; |
| }; |
| |
| port@6 { |
| reg = <0x6>; |
| |
| xbar_admaif6_ep: endpoint { |
| remote-endpoint = <&admaif6_ep>; |
| }; |
| }; |
| |
| port@7 { |
| reg = <0x7>; |
| |
| xbar_admaif7_ep: endpoint { |
| remote-endpoint = <&admaif7_ep>; |
| }; |
| }; |
| |
| port@8 { |
| reg = <0x8>; |
| |
| xbar_admaif8_ep: endpoint { |
| remote-endpoint = <&admaif8_ep>; |
| }; |
| }; |
| |
| port@9 { |
| reg = <0x9>; |
| |
| xbar_admaif9_ep: endpoint { |
| remote-endpoint = <&admaif9_ep>; |
| }; |
| }; |
| |
| port@a { |
| reg = <0xa>; |
| |
| xbar_admaif10_ep: endpoint { |
| remote-endpoint = <&admaif10_ep>; |
| }; |
| }; |
| |
| port@b { |
| reg = <0xb>; |
| |
| xbar_admaif11_ep: endpoint { |
| remote-endpoint = <&admaif11_ep>; |
| }; |
| }; |
| |
| port@c { |
| reg = <0xc>; |
| |
| xbar_admaif12_ep: endpoint { |
| remote-endpoint = <&admaif12_ep>; |
| }; |
| }; |
| |
| port@d { |
| reg = <0xd>; |
| |
| xbar_admaif13_ep: endpoint { |
| remote-endpoint = <&admaif13_ep>; |
| }; |
| }; |
| |
| port@e { |
| reg = <0xe>; |
| |
| xbar_admaif14_ep: endpoint { |
| remote-endpoint = <&admaif14_ep>; |
| }; |
| }; |
| |
| port@f { |
| reg = <0xf>; |
| |
| xbar_admaif15_ep: endpoint { |
| remote-endpoint = <&admaif15_ep>; |
| }; |
| }; |
| |
| port@10 { |
| reg = <0x10>; |
| |
| xbar_admaif16_ep: endpoint { |
| remote-endpoint = <&admaif16_ep>; |
| }; |
| }; |
| |
| port@11 { |
| reg = <0x11>; |
| |
| xbar_admaif17_ep: endpoint { |
| remote-endpoint = <&admaif17_ep>; |
| }; |
| }; |
| |
| port@12 { |
| reg = <0x12>; |
| |
| xbar_admaif18_ep: endpoint { |
| remote-endpoint = <&admaif18_ep>; |
| }; |
| }; |
| |
| port@13 { |
| reg = <0x13>; |
| |
| xbar_admaif19_ep: endpoint { |
| remote-endpoint = <&admaif19_ep>; |
| }; |
| }; |
| |
| xbar_i2s1_port: port@14 { |
| reg = <0x14>; |
| |
| xbar_i2s1_ep: endpoint { |
| remote-endpoint = <&i2s1_cif_ep>; |
| }; |
| }; |
| |
| xbar_i2s2_port: port@15 { |
| reg = <0x15>; |
| |
| xbar_i2s2_ep: endpoint { |
| remote-endpoint = <&i2s2_cif_ep>; |
| }; |
| }; |
| |
| xbar_i2s3_port: port@16 { |
| reg = <0x16>; |
| |
| xbar_i2s3_ep: endpoint { |
| remote-endpoint = <&i2s3_cif_ep>; |
| }; |
| }; |
| |
| xbar_i2s4_port: port@17 { |
| reg = <0x17>; |
| |
| xbar_i2s4_ep: endpoint { |
| remote-endpoint = <&i2s4_cif_ep>; |
| }; |
| }; |
| |
| xbar_i2s5_port: port@18 { |
| reg = <0x18>; |
| |
| xbar_i2s5_ep: endpoint { |
| remote-endpoint = <&i2s5_cif_ep>; |
| }; |
| }; |
| |
| xbar_i2s6_port: port@19 { |
| reg = <0x19>; |
| |
| xbar_i2s6_ep: endpoint { |
| remote-endpoint = <&i2s6_cif_ep>; |
| }; |
| }; |
| |
| xbar_dmic1_port: port@1a { |
| reg = <0x1a>; |
| |
| xbar_dmic1_ep: endpoint { |
| remote-endpoint = <&dmic1_cif_ep>; |
| }; |
| }; |
| |
| xbar_dmic2_port: port@1b { |
| reg = <0x1b>; |
| |
| xbar_dmic2_ep: endpoint { |
| remote-endpoint = <&dmic2_cif_ep>; |
| }; |
| }; |
| |
| xbar_dmic3_port: port@1c { |
| reg = <0x1c>; |
| |
| xbar_dmic3_ep: endpoint { |
| remote-endpoint = <&dmic3_cif_ep>; |
| }; |
| }; |
| |
| xbar_dspk1_port: port@1e { |
| reg = <0x1e>; |
| |
| xbar_dspk1_ep: endpoint { |
| remote-endpoint = <&dspk1_cif_ep>; |
| }; |
| }; |
| |
| xbar_dspk2_port: port@1f { |
| reg = <0x1f>; |
| |
| xbar_dspk2_ep: endpoint { |
| remote-endpoint = <&dspk2_cif_ep>; |
| }; |
| }; |
| |
| xbar_sfc1_in_port: port@20 { |
| reg = <0x20>; |
| |
| xbar_sfc1_in_ep: endpoint { |
| remote-endpoint = <&sfc1_cif_in_ep>; |
| }; |
| }; |
| |
| port@21 { |
| reg = <0x21>; |
| |
| xbar_sfc1_out_ep: endpoint { |
| remote-endpoint = <&sfc1_cif_out_ep>; |
| }; |
| }; |
| |
| xbar_sfc2_in_port: port@22 { |
| reg = <0x22>; |
| |
| xbar_sfc2_in_ep: endpoint { |
| remote-endpoint = <&sfc2_cif_in_ep>; |
| }; |
| }; |
| |
| port@23 { |
| reg = <0x23>; |
| |
| xbar_sfc2_out_ep: endpoint { |
| remote-endpoint = <&sfc2_cif_out_ep>; |
| }; |
| }; |
| |
| xbar_sfc3_in_port: port@24 { |
| reg = <0x24>; |
| |
| xbar_sfc3_in_ep: endpoint { |
| remote-endpoint = <&sfc3_cif_in_ep>; |
| }; |
| }; |
| |
| port@25 { |
| reg = <0x25>; |
| |
| xbar_sfc3_out_ep: endpoint { |
| remote-endpoint = <&sfc3_cif_out_ep>; |
| }; |
| }; |
| |
| xbar_sfc4_in_port: port@26 { |
| reg = <0x26>; |
| |
| xbar_sfc4_in_ep: endpoint { |
| remote-endpoint = <&sfc4_cif_in_ep>; |
| }; |
| }; |
| |
| port@27 { |
| reg = <0x27>; |
| |
| xbar_sfc4_out_ep: endpoint { |
| remote-endpoint = <&sfc4_cif_out_ep>; |
| }; |
| }; |
| |
| xbar_mvc1_in_port: port@28 { |
| reg = <0x28>; |
| |
| xbar_mvc1_in_ep: endpoint { |
| remote-endpoint = <&mvc1_cif_in_ep>; |
| }; |
| }; |
| |
| port@29 { |
| reg = <0x29>; |
| |
| xbar_mvc1_out_ep: endpoint { |
| remote-endpoint = <&mvc1_cif_out_ep>; |
| }; |
| }; |
| |
| xbar_mvc2_in_port: port@2a { |
| reg = <0x2a>; |
| |
| xbar_mvc2_in_ep: endpoint { |
| remote-endpoint = <&mvc2_cif_in_ep>; |
| }; |
| }; |
| |
| port@2b { |
| reg = <0x2b>; |
| |
| xbar_mvc2_out_ep: endpoint { |
| remote-endpoint = <&mvc2_cif_out_ep>; |
| }; |
| }; |
| |
| xbar_amx1_in1_port: port@2c { |
| reg = <0x2c>; |
| |
| xbar_amx1_in1_ep: endpoint { |
| remote-endpoint = <&amx1_in1_ep>; |
| }; |
| }; |
| |
| xbar_amx1_in2_port: port@2d { |
| reg = <0x2d>; |
| |
| xbar_amx1_in2_ep: endpoint { |
| remote-endpoint = <&amx1_in2_ep>; |
| }; |
| }; |
| |
| xbar_amx1_in3_port: port@2e { |
| reg = <0x2e>; |
| |
| xbar_amx1_in3_ep: endpoint { |
| remote-endpoint = <&amx1_in3_ep>; |
| }; |
| }; |
| |
| xbar_amx1_in4_port: port@2f { |
| reg = <0x2f>; |
| |
| xbar_amx1_in4_ep: endpoint { |
| remote-endpoint = <&amx1_in4_ep>; |
| }; |
| }; |
| |
| port@30 { |
| reg = <0x30>; |
| |
| xbar_amx1_out_ep: endpoint { |
| remote-endpoint = <&amx1_out_ep>; |
| }; |
| }; |
| |
| xbar_amx2_in1_port: port@31 { |
| reg = <0x31>; |
| |
| xbar_amx2_in1_ep: endpoint { |
| remote-endpoint = <&amx2_in1_ep>; |
| }; |
| }; |
| |
| xbar_amx2_in2_port: port@32 { |
| reg = <0x32>; |
| |
| xbar_amx2_in2_ep: endpoint { |
| remote-endpoint = <&amx2_in2_ep>; |
| }; |
| }; |
| |
| xbar_amx2_in3_port: port@33 { |
| reg = <0x33>; |
| |
| xbar_amx2_in3_ep: endpoint { |
| remote-endpoint = <&amx2_in3_ep>; |
| }; |
| }; |
| |
| xbar_amx2_in4_port: port@34 { |
| reg = <0x34>; |
| |
| xbar_amx2_in4_ep: endpoint { |
| remote-endpoint = <&amx2_in4_ep>; |
| }; |
| }; |
| |
| port@35 { |
| reg = <0x35>; |
| |
| xbar_amx2_out_ep: endpoint { |
| remote-endpoint = <&amx2_out_ep>; |
| }; |
| }; |
| |
| xbar_amx3_in1_port: port@36 { |
| reg = <0x36>; |
| |
| xbar_amx3_in1_ep: endpoint { |
| remote-endpoint = <&amx3_in1_ep>; |
| }; |
| }; |
| |
| xbar_amx3_in2_port: port@37 { |
| reg = <0x37>; |
| |
| xbar_amx3_in2_ep: endpoint { |
| remote-endpoint = <&amx3_in2_ep>; |
| }; |
| }; |
| |
| xbar_amx3_in3_port: port@38 { |
| reg = <0x38>; |
| |
| xbar_amx3_in3_ep: endpoint { |
| remote-endpoint = <&amx3_in3_ep>; |
| }; |
| }; |
| |
| xbar_amx3_in4_port: port@39 { |
| reg = <0x39>; |
| |
| xbar_amx3_in4_ep: endpoint { |
| remote-endpoint = <&amx3_in4_ep>; |
| }; |
| }; |
| |
| port@3a { |
| reg = <0x3a>; |
| |
| xbar_amx3_out_ep: endpoint { |
| remote-endpoint = <&amx3_out_ep>; |
| }; |
| }; |
| |
| xbar_amx4_in1_port: port@3b { |
| reg = <0x3b>; |
| |
| xbar_amx4_in1_ep: endpoint { |
| remote-endpoint = <&amx4_in1_ep>; |
| }; |
| }; |
| |
| xbar_amx4_in2_port: port@3c { |
| reg = <0x3c>; |
| |
| xbar_amx4_in2_ep: endpoint { |
| remote-endpoint = <&amx4_in2_ep>; |
| }; |
| }; |
| |
| xbar_amx4_in3_port: port@3d { |
| reg = <0x3d>; |
| |
| xbar_amx4_in3_ep: endpoint { |
| remote-endpoint = <&amx4_in3_ep>; |
| }; |
| }; |
| |
| xbar_amx4_in4_port: port@3e { |
| reg = <0x3e>; |
| |
| xbar_amx4_in4_ep: endpoint { |
| remote-endpoint = <&amx4_in4_ep>; |
| }; |
| }; |
| |
| port@3f { |
| reg = <0x3f>; |
| |
| xbar_amx4_out_ep: endpoint { |
| remote-endpoint = <&amx4_out_ep>; |
| }; |
| }; |
| |
| xbar_adx1_in_port: port@40 { |
| reg = <0x40>; |
| |
| xbar_adx1_in_ep: endpoint { |
| remote-endpoint = <&adx1_in_ep>; |
| }; |
| }; |
| |
| port@41 { |
| reg = <0x41>; |
| |
| xbar_adx1_out1_ep: endpoint { |
| remote-endpoint = <&adx1_out1_ep>; |
| }; |
| }; |
| |
| port@42 { |
| reg = <0x42>; |
| |
| xbar_adx1_out2_ep: endpoint { |
| remote-endpoint = <&adx1_out2_ep>; |
| }; |
| }; |
| |
| port@43 { |
| reg = <0x43>; |
| |
| xbar_adx1_out3_ep: endpoint { |
| remote-endpoint = <&adx1_out3_ep>; |
| }; |
| }; |
| |
| port@44 { |
| reg = <0x44>; |
| |
| xbar_adx1_out4_ep: endpoint { |
| remote-endpoint = <&adx1_out4_ep>; |
| }; |
| }; |
| |
| xbar_adx2_in_port: port@45 { |
| reg = <0x45>; |
| |
| xbar_adx2_in_ep: endpoint { |
| remote-endpoint = <&adx2_in_ep>; |
| }; |
| }; |
| |
| port@46 { |
| reg = <0x46>; |
| |
| xbar_adx2_out1_ep: endpoint { |
| remote-endpoint = <&adx2_out1_ep>; |
| }; |
| }; |
| |
| port@47 { |
| reg = <0x47>; |
| |
| xbar_adx2_out2_ep: endpoint { |
| remote-endpoint = <&adx2_out2_ep>; |
| }; |
| }; |
| |
| port@48 { |
| reg = <0x48>; |
| |
| xbar_adx2_out3_ep: endpoint { |
| remote-endpoint = <&adx2_out3_ep>; |
| }; |
| }; |
| |
| port@49 { |
| reg = <0x49>; |
| |
| xbar_adx2_out4_ep: endpoint { |
| remote-endpoint = <&adx2_out4_ep>; |
| }; |
| }; |
| |
| xbar_adx3_in_port: port@4a { |
| reg = <0x4a>; |
| |
| xbar_adx3_in_ep: endpoint { |
| remote-endpoint = <&adx3_in_ep>; |
| }; |
| }; |
| |
| port@4b { |
| reg = <0x4b>; |
| |
| xbar_adx3_out1_ep: endpoint { |
| remote-endpoint = <&adx3_out1_ep>; |
| }; |
| }; |
| |
| port@4c { |
| reg = <0x4c>; |
| |
| xbar_adx3_out2_ep: endpoint { |
| remote-endpoint = <&adx3_out2_ep>; |
| }; |
| }; |
| |
| port@4d { |
| reg = <0x4d>; |
| |
| xbar_adx3_out3_ep: endpoint { |
| remote-endpoint = <&adx3_out3_ep>; |
| }; |
| }; |
| |
| port@4e { |
| reg = <0x4e>; |
| |
| xbar_adx3_out4_ep: endpoint { |
| remote-endpoint = <&adx3_out4_ep>; |
| }; |
| }; |
| |
| xbar_adx4_in_port: port@4f { |
| reg = <0x4f>; |
| |
| xbar_adx4_in_ep: endpoint { |
| remote-endpoint = <&adx4_in_ep>; |
| }; |
| }; |
| |
| port@50 { |
| reg = <0x50>; |
| |
| xbar_adx4_out1_ep: endpoint { |
| remote-endpoint = <&adx4_out1_ep>; |
| }; |
| }; |
| |
| port@51 { |
| reg = <0x51>; |
| |
| xbar_adx4_out2_ep: endpoint { |
| remote-endpoint = <&adx4_out2_ep>; |
| }; |
| }; |
| |
| port@52 { |
| reg = <0x52>; |
| |
| xbar_adx4_out3_ep: endpoint { |
| remote-endpoint = <&adx4_out3_ep>; |
| }; |
| }; |
| |
| port@53 { |
| reg = <0x53>; |
| |
| xbar_adx4_out4_ep: endpoint { |
| remote-endpoint = <&adx4_out4_ep>; |
| }; |
| }; |
| |
| xbar_mixer_in1_port: port@54 { |
| reg = <0x54>; |
| |
| xbar_mixer_in1_ep: endpoint { |
| remote-endpoint = <&mixer_in1_ep>; |
| }; |
| }; |
| |
| xbar_mixer_in2_port: port@55 { |
| reg = <0x55>; |
| |
| xbar_mixer_in2_ep: endpoint { |
| remote-endpoint = <&mixer_in2_ep>; |
| }; |
| }; |
| |
| xbar_mixer_in3_port: port@56 { |
| reg = <0x56>; |
| |
| xbar_mixer_in3_ep: endpoint { |
| remote-endpoint = <&mixer_in3_ep>; |
| }; |
| }; |
| |
| xbar_mixer_in4_port: port@57 { |
| reg = <0x57>; |
| |
| xbar_mixer_in4_ep: endpoint { |
| remote-endpoint = <&mixer_in4_ep>; |
| }; |
| }; |
| |
| xbar_mixer_in5_port: port@58 { |
| reg = <0x58>; |
| |
| xbar_mixer_in5_ep: endpoint { |
| remote-endpoint = <&mixer_in5_ep>; |
| }; |
| }; |
| |
| xbar_mixer_in6_port: port@59 { |
| reg = <0x59>; |
| |
| xbar_mixer_in6_ep: endpoint { |
| remote-endpoint = <&mixer_in6_ep>; |
| }; |
| }; |
| |
| xbar_mixer_in7_port: port@5a { |
| reg = <0x5a>; |
| |
| xbar_mixer_in7_ep: endpoint { |
| remote-endpoint = <&mixer_in7_ep>; |
| }; |
| }; |
| |
| xbar_mixer_in8_port: port@5b { |
| reg = <0x5b>; |
| |
| xbar_mixer_in8_ep: endpoint { |
| remote-endpoint = <&mixer_in8_ep>; |
| }; |
| }; |
| |
| xbar_mixer_in9_port: port@5c { |
| reg = <0x5c>; |
| |
| xbar_mixer_in9_ep: endpoint { |
| remote-endpoint = <&mixer_in9_ep>; |
| }; |
| }; |
| |
| xbar_mixer_in10_port: port@5d { |
| reg = <0x5d>; |
| |
| xbar_mixer_in10_ep: endpoint { |
| remote-endpoint = <&mixer_in10_ep>; |
| }; |
| }; |
| |
| port@5e { |
| reg = <0x5e>; |
| |
| xbar_mixer_out1_ep: endpoint { |
| remote-endpoint = <&mixer_out1_ep>; |
| }; |
| }; |
| |
| port@5f { |
| reg = <0x5f>; |
| |
| xbar_mixer_out2_ep: endpoint { |
| remote-endpoint = <&mixer_out2_ep>; |
| }; |
| }; |
| |
| port@60 { |
| reg = <0x60>; |
| |
| xbar_mixer_out3_ep: endpoint { |
| remote-endpoint = <&mixer_out3_ep>; |
| }; |
| }; |
| |
| port@61 { |
| reg = <0x61>; |
| |
| xbar_mixer_out4_ep: endpoint { |
| remote-endpoint = <&mixer_out4_ep>; |
| }; |
| }; |
| |
| port@62 { |
| reg = <0x62>; |
| |
| xbar_mixer_out5_ep: endpoint { |
| remote-endpoint = <&mixer_out5_ep>; |
| }; |
| }; |
| |
| xbar_asrc_in1_port: port@63 { |
| reg = <0x63>; |
| |
| xbar_asrc_in1_ep: endpoint { |
| remote-endpoint = <&asrc_in1_ep>; |
| }; |
| }; |
| |
| port@64 { |
| reg = <0x64>; |
| |
| xbar_asrc_out1_ep: endpoint { |
| remote-endpoint = <&asrc_out1_ep>; |
| }; |
| }; |
| |
| xbar_asrc_in2_port: port@65 { |
| reg = <0x65>; |
| |
| xbar_asrc_in2_ep: endpoint { |
| remote-endpoint = <&asrc_in2_ep>; |
| }; |
| }; |
| |
| port@66 { |
| reg = <0x66>; |
| |
| xbar_asrc_out2_ep: endpoint { |
| remote-endpoint = <&asrc_out2_ep>; |
| }; |
| }; |
| |
| xbar_asrc_in3_port: port@67 { |
| reg = <0x67>; |
| |
| xbar_asrc_in3_ep: endpoint { |
| remote-endpoint = <&asrc_in3_ep>; |
| }; |
| }; |
| |
| port@68 { |
| reg = <0x68>; |
| |
| xbar_asrc_out3_ep: endpoint { |
| remote-endpoint = <&asrc_out3_ep>; |
| }; |
| }; |
| |
| xbar_asrc_in4_port: port@69 { |
| reg = <0x69>; |
| |
| xbar_asrc_in4_ep: endpoint { |
| remote-endpoint = <&asrc_in4_ep>; |
| }; |
| }; |
| |
| port@6a { |
| reg = <0x6a>; |
| |
| xbar_asrc_out4_ep: endpoint { |
| remote-endpoint = <&asrc_out4_ep>; |
| }; |
| }; |
| |
| xbar_asrc_in5_port: port@6b { |
| reg = <0x6b>; |
| |
| xbar_asrc_in5_ep: endpoint { |
| remote-endpoint = <&asrc_in5_ep>; |
| }; |
| }; |
| |
| port@6c { |
| reg = <0x6c>; |
| |
| xbar_asrc_out5_ep: endpoint { |
| remote-endpoint = <&asrc_out5_ep>; |
| }; |
| }; |
| |
| xbar_asrc_in6_port: port@6d { |
| reg = <0x6d>; |
| |
| xbar_asrc_in6_ep: endpoint { |
| remote-endpoint = <&asrc_in6_ep>; |
| }; |
| }; |
| |
| port@6e { |
| reg = <0x6e>; |
| |
| xbar_asrc_out6_ep: endpoint { |
| remote-endpoint = <&asrc_out6_ep>; |
| }; |
| }; |
| |
| xbar_asrc_in7_port: port@6f { |
| reg = <0x6f>; |
| |
| xbar_asrc_in7_ep: endpoint { |
| remote-endpoint = <&asrc_in7_ep>; |
| }; |
| }; |
| |
| xbar_ope1_in_port: port@70 { |
| reg = <0x70>; |
| |
| xbar_ope1_in_ep: endpoint { |
| remote-endpoint = <&ope1_cif_in_ep>; |
| }; |
| }; |
| |
| port@71 { |
| reg = <0x71>; |
| |
| xbar_ope1_out_ep: endpoint { |
| remote-endpoint = <&ope1_cif_out_ep>; |
| }; |
| }; |
| }; |
| }; |
| |
| dma-controller@2930000 { |
| status = "okay"; |
| }; |
| |
| interrupt-controller@2a40000 { |
| status = "okay"; |
| }; |
| }; |
| |
| i2c@3160000 { |
| power-monitor@42 { |
| compatible = "ti,ina3221"; |
| reg = <0x42>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| input@0 { |
| reg = <0x0>; |
| label = "VDD_MUX"; |
| shunt-resistor-micro-ohms = <20000>; |
| }; |
| |
| input@1 { |
| reg = <0x1>; |
| label = "VDD_5V0_IO_SYS"; |
| shunt-resistor-micro-ohms = <5000>; |
| }; |
| |
| input@2 { |
| reg = <0x2>; |
| label = "VDD_3V3_SYS"; |
| shunt-resistor-micro-ohms = <10000>; |
| }; |
| }; |
| |
| power-monitor@43 { |
| compatible = "ti,ina3221"; |
| reg = <0x43>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| input@0 { |
| reg = <0x0>; |
| label = "VDD_3V3_IO_SLP"; |
| shunt-resistor-micro-ohms = <10000>; |
| }; |
| |
| input@1 { |
| reg = <0x1>; |
| label = "VDD_1V8_IO"; |
| shunt-resistor-micro-ohms = <10000>; |
| }; |
| |
| input@2 { |
| reg = <0x2>; |
| label = "VDD_M2_IN"; |
| shunt-resistor-micro-ohms = <10000>; |
| }; |
| }; |
| |
| exp1: gpio@74 { |
| compatible = "ti,tca9539"; |
| reg = <0x74>; |
| |
| interrupt-parent = <&gpio>; |
| interrupts = <TEGRA186_MAIN_GPIO(Y, 0) |
| GPIO_ACTIVE_LOW>; |
| |
| #gpio-cells = <2>; |
| gpio-controller; |
| |
| vcc-supply = <&vdd_3v3_sys>; |
| }; |
| |
| exp2: gpio@77 { |
| compatible = "ti,tca9539"; |
| reg = <0x77>; |
| |
| interrupt-parent = <&gpio>; |
| interrupts = <TEGRA186_MAIN_GPIO(Y, 6) |
| GPIO_ACTIVE_LOW>; |
| |
| #gpio-cells = <2>; |
| gpio-controller; |
| |
| vcc-supply = <&vdd_1v8>; |
| }; |
| }; |
| |
| /* SDMMC1 (SD/MMC) */ |
| mmc@3400000 { |
| status = "okay"; |
| |
| vmmc-supply = <&vdd_sd>; |
| }; |
| |
| sata@3507000 { |
| status = "okay"; |
| }; |
| |
| hda@3510000 { |
| nvidia,model = "NVIDIA Jetson TX2 HDA"; |
| status = "okay"; |
| }; |
| |
| padctl@3520000 { |
| status = "okay"; |
| |
| avdd-pll-erefeut-supply = <&vdd_1v8_pll>; |
| avdd-usb-supply = <&vdd_3v3_sys>; |
| vclamp-usb-supply = <&vdd_1v8>; |
| vddio-hsic-supply = <&gnd>; |
| |
| pads { |
| usb2 { |
| status = "okay"; |
| |
| lanes { |
| micro_b: usb2-0 { |
| nvidia,function = "xusb"; |
| status = "okay"; |
| }; |
| |
| usb2-1 { |
| nvidia,function = "xusb"; |
| status = "okay"; |
| }; |
| |
| usb2-2 { |
| nvidia,function = "xusb"; |
| status = "okay"; |
| }; |
| }; |
| }; |
| |
| usb3 { |
| status = "okay"; |
| |
| lanes { |
| usb3-0 { |
| nvidia,function = "xusb"; |
| status = "okay"; |
| }; |
| |
| usb3-1 { |
| nvidia,function = "xusb"; |
| status = "okay"; |
| }; |
| |
| usb3-2 { |
| nvidia,function = "xusb"; |
| status = "okay"; |
| }; |
| }; |
| }; |
| }; |
| |
| ports { |
| usb2-0 { |
| status = "okay"; |
| mode = "otg"; |
| vbus-supply = <&vdd_usb0>; |
| usb-role-switch; |
| |
| connector { |
| compatible = "gpio-usb-b-connector", |
| "usb-b-connector"; |
| label = "micro-USB"; |
| type = "micro"; |
| vbus-gpios = <&gpio |
| TEGRA186_MAIN_GPIO(X, 7) |
| GPIO_ACTIVE_LOW>; |
| id-gpios = <&pmic 0 GPIO_ACTIVE_HIGH>; |
| }; |
| }; |
| |
| usb2-1 { |
| status = "okay"; |
| mode = "host"; |
| |
| vbus-supply = <&vdd_usb1>; |
| }; |
| |
| usb3-0 { |
| nvidia,usb2-companion = <1>; |
| vbus-supply = <&vdd_usb1>; |
| status = "okay"; |
| }; |
| }; |
| }; |
| |
| usb@3530000 { |
| status = "okay"; |
| |
| phys = <&{/padctl@3520000/pads/usb2/lanes/usb2-0}>, |
| <&{/padctl@3520000/pads/usb2/lanes/usb2-1}>, |
| <&{/padctl@3520000/pads/usb3/lanes/usb3-0}>; |
| phy-names = "usb2-0", "usb2-1", "usb3-0"; |
| }; |
| |
| usb@3550000 { |
| status = "okay"; |
| |
| phys = <µ_b>; |
| phy-names = "usb2-0"; |
| }; |
| |
| i2c@c250000 { |
| /* carrier board ID EEPROM */ |
| eeprom@57 { |
| compatible = "atmel,24c02"; |
| reg = <0x57>; |
| |
| label = "system"; |
| vcc-supply = <&vdd_1v8>; |
| address-width = <8>; |
| pagesize = <8>; |
| size = <256>; |
| read-only; |
| }; |
| }; |
| |
| pcie@10003000 { |
| status = "okay"; |
| |
| dvdd-pex-supply = <&vdd_pex>; |
| hvdd-pex-pll-supply = <&vdd_1v8>; |
| hvdd-pex-supply = <&vdd_1v8>; |
| vddio-pexctl-aud-supply = <&vdd_1v8>; |
| |
| pci@1,0 { |
| nvidia,num-lanes = <4>; |
| status = "okay"; |
| }; |
| |
| pci@2,0 { |
| nvidia,num-lanes = <0>; |
| status = "disabled"; |
| }; |
| |
| pci@3,0 { |
| nvidia,num-lanes = <1>; |
| status = "disabled"; |
| }; |
| }; |
| |
| host1x@13e00000 { |
| status = "okay"; |
| |
| dpaux@15040000 { |
| status = "okay"; |
| }; |
| |
| display-hub@15200000 { |
| status = "okay"; |
| }; |
| |
| dsi@15300000 { |
| status = "disabled"; |
| }; |
| |
| /* DP on E3320 */ |
| sor@15540000 { |
| status = "okay"; |
| |
| avdd-io-hdmi-dp-supply = <&vdd_hdmi_1v05>; |
| vdd-hdmi-dp-pll-supply = <&vdd_1v8_ap>; |
| |
| nvidia,dpaux = <&dpaux>; |
| }; |
| |
| sor@15580000 { |
| status = "okay"; |
| |
| avdd-io-hdmi-dp-supply = <&vdd_hdmi_1v05>; |
| vdd-hdmi-dp-pll-supply = <&vdd_1v8_ap>; |
| hdmi-supply = <&vdd_hdmi>; |
| |
| nvidia,ddc-i2c-bus = <&ddc>; |
| nvidia,hpd-gpio = <&gpio TEGRA186_MAIN_GPIO(P, 1) |
| GPIO_ACTIVE_LOW>; |
| }; |
| |
| dpaux@155c0000 { |
| status = "okay"; |
| }; |
| }; |
| |
| gpio-keys { |
| compatible = "gpio-keys"; |
| |
| key-power { |
| label = "Power"; |
| gpios = <&gpio_aon TEGRA186_AON_GPIO(FF, 0) |
| GPIO_ACTIVE_LOW>; |
| linux,input-type = <EV_KEY>; |
| linux,code = <KEY_POWER>; |
| debounce-interval = <10>; |
| wakeup-event-action = <EV_ACT_ASSERTED>; |
| wakeup-source; |
| }; |
| |
| key-volume-down { |
| label = "Volume Down"; |
| gpios = <&gpio_aon TEGRA186_AON_GPIO(FF, 2) |
| GPIO_ACTIVE_LOW>; |
| linux,input-type = <EV_KEY>; |
| linux,code = <KEY_VOLUMEDOWN>; |
| debounce-interval = <10>; |
| }; |
| |
| key-volume-up { |
| label = "Volume Up"; |
| gpios = <&gpio_aon TEGRA186_AON_GPIO(FF, 1) |
| GPIO_ACTIVE_LOW>; |
| linux,input-type = <EV_KEY>; |
| linux,code = <KEY_VOLUMEUP>; |
| debounce-interval = <10>; |
| }; |
| }; |
| |
| vdd_sd: regulator-vdd-sd { |
| compatible = "regulator-fixed"; |
| regulator-name = "SD_CARD_SW_PWR"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| |
| gpio = <&gpio TEGRA186_MAIN_GPIO(P, 6) GPIO_ACTIVE_HIGH>; |
| enable-active-high; |
| |
| vin-supply = <&vdd_3v3_sys>; |
| }; |
| |
| vdd_hdmi: regulator-vdd-hdmi { |
| compatible = "regulator-fixed"; |
| regulator-name = "VDD_HDMI_5V0"; |
| regulator-min-microvolt = <5000000>; |
| regulator-max-microvolt = <5000000>; |
| |
| gpio = <&exp1 14 GPIO_ACTIVE_HIGH>; |
| enable-active-high; |
| |
| vin-supply = <&vdd_5v0_sys>; |
| }; |
| |
| vdd_usb0: regulator-vdd-usb0 { |
| compatible = "regulator-fixed"; |
| regulator-name = "VDD_USB0"; |
| regulator-min-microvolt = <5000000>; |
| regulator-max-microvolt = <5000000>; |
| |
| gpio = <&gpio TEGRA186_MAIN_GPIO(L, 4) GPIO_ACTIVE_HIGH>; |
| enable-active-high; |
| |
| vin-supply = <&vdd_5v0_sys>; |
| }; |
| |
| vdd_usb1: regulator-vdd-usb1 { |
| compatible = "regulator-fixed"; |
| regulator-name = "VDD_USB1"; |
| regulator-min-microvolt = <5000000>; |
| regulator-max-microvolt = <5000000>; |
| |
| gpio = <&gpio TEGRA186_MAIN_GPIO(L, 5) GPIO_ACTIVE_HIGH>; |
| enable-active-high; |
| |
| vin-supply = <&vdd_5v0_sys>; |
| }; |
| |
| sound { |
| compatible = "nvidia,tegra186-audio-graph-card"; |
| status = "okay"; |
| |
| dais = /* FE */ |
| <&admaif0_port>, <&admaif1_port>, <&admaif2_port>, <&admaif3_port>, |
| <&admaif4_port>, <&admaif5_port>, <&admaif6_port>, <&admaif7_port>, |
| <&admaif8_port>, <&admaif9_port>, <&admaif10_port>, <&admaif11_port>, |
| <&admaif12_port>, <&admaif13_port>, <&admaif14_port>, <&admaif15_port>, |
| <&admaif16_port>, <&admaif17_port>, <&admaif18_port>, <&admaif19_port>, |
| /* Router */ |
| <&xbar_i2s1_port>, <&xbar_i2s2_port>, <&xbar_i2s3_port>, |
| <&xbar_i2s4_port>, <&xbar_i2s5_port>, <&xbar_i2s6_port>, |
| <&xbar_dmic1_port>, <&xbar_dmic2_port>, <&xbar_dmic3_port>, |
| <&xbar_dspk1_port>, <&xbar_dspk2_port>, |
| <&xbar_sfc1_in_port>, <&xbar_sfc2_in_port>, |
| <&xbar_sfc3_in_port>, <&xbar_sfc4_in_port>, |
| <&xbar_mvc1_in_port>, <&xbar_mvc2_in_port>, |
| <&xbar_amx1_in1_port>, <&xbar_amx1_in2_port>, |
| <&xbar_amx1_in3_port>, <&xbar_amx1_in4_port>, |
| <&xbar_amx2_in1_port>, <&xbar_amx2_in2_port>, |
| <&xbar_amx2_in3_port>, <&xbar_amx2_in4_port>, |
| <&xbar_amx3_in1_port>, <&xbar_amx3_in2_port>, |
| <&xbar_amx3_in3_port>, <&xbar_amx3_in4_port>, |
| <&xbar_amx4_in1_port>, <&xbar_amx4_in2_port>, |
| <&xbar_amx4_in3_port>, <&xbar_amx4_in4_port>, |
| <&xbar_adx1_in_port>, <&xbar_adx2_in_port>, |
| <&xbar_adx3_in_port>, <&xbar_adx4_in_port>, |
| <&xbar_mixer_in1_port>, <&xbar_mixer_in2_port>, |
| <&xbar_mixer_in3_port>, <&xbar_mixer_in4_port>, |
| <&xbar_mixer_in5_port>, <&xbar_mixer_in6_port>, |
| <&xbar_mixer_in7_port>, <&xbar_mixer_in8_port>, |
| <&xbar_mixer_in9_port>, <&xbar_mixer_in10_port>, |
| <&xbar_asrc_in1_port>, <&xbar_asrc_in2_port>, |
| <&xbar_asrc_in3_port>, <&xbar_asrc_in4_port>, |
| <&xbar_asrc_in5_port>, <&xbar_asrc_in6_port>, |
| <&xbar_asrc_in7_port>, |
| <&xbar_ope1_in_port>, |
| /* HW accelerators */ |
| <&sfc1_out_port>, <&sfc2_out_port>, |
| <&sfc3_out_port>, <&sfc4_out_port>, |
| <&mvc1_out_port>, <&mvc2_out_port>, |
| <&amx1_out_port>, <&amx2_out_port>, |
| <&amx3_out_port>, <&amx4_out_port>, |
| <&adx1_out1_port>, <&adx1_out2_port>, |
| <&adx1_out3_port>, <&adx1_out4_port>, |
| <&adx2_out1_port>, <&adx2_out2_port>, |
| <&adx2_out3_port>, <&adx2_out4_port>, |
| <&adx3_out1_port>, <&adx3_out2_port>, |
| <&adx3_out3_port>, <&adx3_out4_port>, |
| <&adx4_out1_port>, <&adx4_out2_port>, |
| <&adx4_out3_port>, <&adx4_out4_port>, |
| <&mixer_out1_port>, <&mixer_out2_port>, |
| <&mixer_out3_port>, <&mixer_out4_port>, |
| <&mixer_out5_port>, |
| <&asrc_out1_port>, <&asrc_out2_port>, <&asrc_out3_port>, |
| <&asrc_out4_port>, <&asrc_out5_port>, <&asrc_out6_port>, |
| <&ope1_out_port>, |
| /* I/O */ |
| <&i2s1_port>, <&i2s2_port>, <&i2s3_port>, <&i2s4_port>, |
| <&i2s5_port>, <&i2s6_port>, <&dmic1_port>, <&dmic2_port>, |
| <&dmic3_port>, <&dspk1_port>, <&dspk2_port>; |
| |
| label = "NVIDIA Jetson TX2 APE"; |
| }; |
| }; |
