arch/arm64/boot/dts/amlogic/meson-gxm.dtsi

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (c) 2016 Endless Computers, Inc.
 * Author: Carlo Caione <carlo@endlessm.com>
 */

#include "meson-gxl.dtsi"

/ {
	compatible = "amlogic,meson-gxm";

	cpus {
		cpu-map {
			cluster0 {
				core0 {
					cpu = <&cpu0>;
				};
				core1 {
					cpu = <&cpu1>;
				};
				core2 {
					cpu = <&cpu2>;
				};
				core3 {
					cpu = <&cpu3>;
				};
			};

			cluster1 {
				core0 {
					cpu = <&cpu4>;
				};
				core1 {
					cpu = <&cpu5>;
				};
				core2 {
					cpu = <&cpu6>;
				};
				core3 {
					cpu = <&cpu7>;
				};
			};
		};

		cpu4: cpu@100 {
			device_type = "cpu";
			compatible = "arm,cortex-a53", "arm,armv8";
			reg = <0x0 0x100>;
			enable-method = "psci";
			next-level-cache = <&l2>;
			clocks = <&scpi_dvfs 1>;
		};

		cpu5: cpu@101 {
			device_type = "cpu";
			compatible = "arm,cortex-a53", "arm,armv8";
			reg = <0x0 0x101>;
			enable-method = "psci";
			next-level-cache = <&l2>;
			clocks = <&scpi_dvfs 1>;
		};

		cpu6: cpu@102 {
			device_type = "cpu";
			compatible = "arm,cortex-a53", "arm,armv8";
			reg = <0x0 0x102>;
			enable-method = "psci";
			next-level-cache = <&l2>;
			clocks = <&scpi_dvfs 1>;
		};

		cpu7: cpu@103 {
			device_type = "cpu";
			compatible = "arm,cortex-a53", "arm,armv8";
			reg = <0x0 0x103>;
			enable-method = "psci";
			next-level-cache = <&l2>;
			clocks = <&scpi_dvfs 1>;
		};
	};
};

&clkc_AO {
	compatible = "amlogic,meson-gxm-aoclkc", "amlogic,meson-gx-aoclkc";
};

&saradc {
	compatible = "amlogic,meson-gxm-saradc", "amlogic,meson-saradc";
};

&scpi_dvfs {
	clock-indices = <0 1>;
	clock-output-names = "vbig", "vlittle";
};

&vpu {
	compatible = "amlogic,meson-gxm-vpu", "amlogic,meson-gx-vpu";
};

&hdmi_tx {
	compatible = "amlogic,meson-gxm-dw-hdmi", "amlogic,meson-gx-dw-hdmi";
};