| Devicetree bindings for Zynq Ultrascale MPSoC FPGA Manager. |
| The ZynqMP SoC uses the PCAP (Processor configuration Port) to configure the |
| Programmable Logic (PL). The configuration uses the firmware interface. |
| |
| Required properties: |
| - compatible: should contain "xlnx,zynqmp-pcap-fpga" |
| |
| Example for full FPGA configuration: |
| |
| fpga-region0 { |
| compatible = "fpga-region"; |
| fpga-mgr = <&zynqmp_pcap>; |
| #address-cells = <0x1>; |
| #size-cells = <0x1>; |
| }; |
| |
| firmware { |
| zynqmp_firmware: zynqmp-firmware { |
| compatible = "xlnx,zynqmp-firmware"; |
| method = "smc"; |
| zynqmp_pcap: pcap { |
| compatible = "xlnx,zynqmp-pcap-fpga"; |
| }; |
| }; |
| }; |