Documentation/devicetree/bindings/i2c/renesas,riic.yaml

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/i2c/renesas,riic.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Renesas RZ/A and RZ/G2L I2C Bus Interface (RIIC)

maintainers:
  - Chris Brandt <chris.brandt@renesas.com>
  - Wolfram Sang <wsa+renesas@sang-engineering.com>

allOf:
  - $ref: /schemas/i2c/i2c-controller.yaml#

properties:
  compatible:
    items:
      - enum:
          - renesas,riic-r7s72100   # RZ/A1H
          - renesas,riic-r7s9210    # RZ/A2M
          - renesas,riic-r9a07g044  # RZ/G2{L,LC}
      - const: renesas,riic-rz      # RZ/A or RZ/G2L

  reg:
    maxItems: 1

  interrupts:
    items:
      - description: Transmit End Interrupt (TEI)
      - description: Receive Data Full Interrupt (RI)
      - description: Transmit Data Empty Interrupt (TI)
      - description: Stop Condition Detection Interrupt (SPI)
      - description: Start Condition Detection Interrupt (STI)
      - description: NACK Reception Interrupt (NAKI)
      - description: Arbitration-Lost Interrupt (ALI)
      - description: Timeout Interrupt (TMOI)

  clock-frequency:
    description:
      Desired I2C bus clock frequency in Hz. The absence of this property
      indicates the default frequency 100 kHz.

  clocks:
    maxItems: 1

  power-domains:
    maxItems: 1

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - clock-frequency
  - power-domains
  - '#address-cells'
  - '#size-cells'

if:
  properties:
    compatible:
      contains:
        enum:
          - renesas,riic-r9a07g044
then:
  required:
    - resets

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/clock/r7s72100-clock.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>

    i2c0: i2c@fcfee000 {
            compatible = "renesas,riic-r7s72100", "renesas,riic-rz";
            reg = <0xfcfee000 0x44>;
            interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
                         <GIC_SPI 158 IRQ_TYPE_EDGE_RISING>,
                         <GIC_SPI 159 IRQ_TYPE_EDGE_RISING>,
                         <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
                         <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
                         <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
                         <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
                         <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
            clocks = <&mstp9_clks R7S72100_CLK_I2C0>;
            clock-frequency = <100000>;
            power-domains = <&cpg_clocks>;
            #address-cells = <1>;
            #size-cells = <0>;
    };