| // SPDX-License-Identifier: GPL-2.0-or-later |
| /* |
| * AmigaOne Device Tree Source |
| * |
| * Copyright 2008 Gerhard Pircher (gerhard_pircher@gmx.net) |
| */ |
| |
| /dts-v1/; |
| |
| / { |
| model = "AmigaOne"; |
| compatible = "eyetech,amigaone"; |
| coherency-off; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| |
| cpus { |
| #cpus = <1>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| cpu@0 { |
| device_type = "cpu"; |
| reg = <0>; |
| d-cache-line-size = <32>; // 32 bytes |
| i-cache-line-size = <32>; // 32 bytes |
| d-cache-size = <32768>; // L1, 32K |
| i-cache-size = <32768>; // L1, 32K |
| timebase-frequency = <0>; // 33.3 MHz, from U-boot |
| clock-frequency = <0>; // From U-boot |
| bus-frequency = <0>; // From U-boot |
| }; |
| }; |
| |
| memory { |
| device_type = "memory"; |
| reg = <0 0>; // From U-boot |
| }; |
| |
| pci@80000000 { |
| device_type = "pci"; |
| compatible = "mai-logic,articia-s"; |
| bus-frequency = <33333333>; |
| bus-range = <0 0xff>; |
| ranges = <0x01000000 0 0x00000000 0xfe000000 0 0x00c00000 // PCI I/O |
| 0x02000000 0 0x80000000 0x80000000 0 0x7d000000 // PCI memory |
| 0x02000000 0 0x00000000 0xfd000000 0 0x01000000>; // PCI alias memory (ISA) |
| // Configuration address and data register. |
| reg = <0xfec00cf8 4 |
| 0xfee00cfc 4>; |
| 8259-interrupt-acknowledge = <0xfef00000>; |
| // Do not define a interrupt-parent here, if there is no |
| // interrupt-map property. |
| #address-cells = <3>; |
| #size-cells = <2>; |
| |
| isa@7 { |
| device_type = "isa"; |
| compatible = "pciclass,0601"; |
| vendor-id = <0x00001106>; |
| device-id = <0x00000686>; |
| revision-id = <0x00000010>; |
| class-code = <0x00060100>; |
| subsystem-id = <0>; |
| subsystem-vendor-id = <0>; |
| devsel-speed = <0x00000001>; |
| min-grant = <0>; |
| max-latency = <0>; |
| /* First 4k for I/O at 0x0 on PCI mapped to 0x0 on ISA. */ |
| ranges = <0x00000001 0 0x01000000 0 0x00000000 0x00001000>; |
| interrupt-parent = <&i8259>; |
| #interrupt-cells = <2>; |
| #address-cells = <2>; |
| #size-cells = <1>; |
| |
| dma-controller@0 { |
| compatible = "pnpPNP,200"; |
| reg = <1 0x00000000 0x00000020 |
| 1 0x00000080 0x00000010 |
| 1 0x000000c0 0x00000020>; |
| }; |
| |
| i8259: interrupt-controller@20 { |
| device_type = "interrupt-controller"; |
| compatible = "pnpPNP,000"; |
| interrupt-controller; |
| reg = <1 0x00000020 0x00000002 |
| 1 0x000000a0 0x00000002 |
| 1 0x000004d0 0x00000002>; |
| reserved-interrupts = <2>; |
| #interrupt-cells = <2>; |
| }; |
| |
| timer@40 { |
| // Also adds pcspkr to platform devices. |
| compatible = "pnpPNP,100"; |
| reg = <1 0x00000040 0x00000020>; |
| }; |
| |
| 8042@60 { |
| device_type = "8042"; |
| reg = <1 0x00000060 0x00000001 |
| 1 0x00000064 0x00000001>; |
| interrupts = <1 3 12 3>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| keyboard@0 { |
| compatible = "pnpPNP,303"; |
| reg = <0>; |
| }; |
| |
| mouse@1 { |
| compatible = "pnpPNP,f03"; |
| reg = <1>; |
| }; |
| }; |
| |
| rtc@70 { |
| compatible = "pnpPNP,b00"; |
| reg = <1 0x00000070 0x00000002>; |
| interrupts = <8 3>; |
| }; |
| |
| serial@3f8 { |
| device_type = "serial"; |
| compatible = "pnpPNP,501","pnpPNP,500"; |
| reg = <1 0x000003f8 0x00000008>; |
| interrupts = <4 3>; |
| clock-frequency = <1843200>; |
| current-speed = <115200>; |
| }; |
| |
| serial@2f8 { |
| device_type = "serial"; |
| compatible = "pnpPNP,501","pnpPNP,500"; |
| reg = <1 0x000002f8 0x00000008>; |
| interrupts = <3 3>; |
| clock-frequency = <1843200>; |
| current-speed = <115200>; |
| }; |
| |
| parallel@378 { |
| device_type = "parallel"; |
| // No ECP support for now, otherwise add "pnpPNP,401". |
| compatible = "pnpPNP,400"; |
| reg = <1 0x00000378 0x00000003 |
| 1 0x00000778 0x00000003>; |
| }; |
| |
| fdc@3f0 { |
| device_type = "fdc"; |
| compatible = "pnpPNP,700"; |
| reg = <1 0x000003f0 0x00000008>; |
| interrupts = <6 3>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| disk@0 { |
| reg = <0>; |
| }; |
| }; |
| }; |
| }; |
| |
| chosen { |
| stdout-path = "/pci@80000000/isa@7/serial@3f8"; |
| }; |
| }; |