Documentation/devicetree/bindings/dma/owl-dma.yaml

# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/dma/owl-dma.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Actions Semi Owl SoCs DMA controller

description: |
  The OWL DMA is a general-purpose direct memory access controller capable of
  supporting 10 and 12 independent DMA channels for S700 and S900 SoCs
  respectively.

maintainers:
  - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>

allOf:
  - $ref: "dma-controller.yaml#"

properties:
  compatible:
    enum:
      - actions,s900-dma
      - actions,s700-dma

  reg:
    maxItems: 1

  interrupts:
    description:
      controller supports 4 interrupts, which are freely assignable to the
      DMA channels.
    maxItems: 4

  "#dma-cells":
    const: 1

  dma-channels:
    maximum: 12

  dma-requests:
    maximum: 46

  clocks:
    maxItems: 1
    description:
      Phandle and Specifier of the clock feeding the DMA controller.

  power-domains:
    maxItems: 1

required:
  - compatible
  - reg
  - interrupts
  - "#dma-cells"
  - dma-channels
  - dma-requests
  - clocks

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    dma: dma-controller@e0260000 {
        compatible = "actions,s900-dma";
        reg = <0xe0260000 0x1000>;
        interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
        #dma-cells = <1>;
        dma-channels = <12>;
        dma-requests = <46>;
        clocks = <&clock 22>;
    };

...