| /* SPDX-License-Identifier: GPL-2.0-only */ |
| /* |
| * Copyright (c) 2014 MediaTek Inc. |
| * Author: James Liao <jamesjj.liao@mediatek.com> |
| */ |
| |
| #ifndef __DRV_CLK_GATE_H |
| #define __DRV_CLK_GATE_H |
| |
| #include <linux/regmap.h> |
| #include <linux/clk-provider.h> |
| |
| struct clk; |
| |
| struct mtk_clk_gate { |
| struct clk_hw hw; |
| struct regmap *regmap; |
| int set_ofs; |
| int clr_ofs; |
| int sta_ofs; |
| u8 bit; |
| }; |
| |
| static inline struct mtk_clk_gate *to_mtk_clk_gate(struct clk_hw *hw) |
| { |
| return container_of(hw, struct mtk_clk_gate, hw); |
| } |
| |
| extern const struct clk_ops mtk_clk_gate_ops_setclr; |
| extern const struct clk_ops mtk_clk_gate_ops_setclr_inv; |
| extern const struct clk_ops mtk_clk_gate_ops_no_setclr; |
| extern const struct clk_ops mtk_clk_gate_ops_no_setclr_inv; |
| |
| struct clk *mtk_clk_register_gate( |
| const char *name, |
| const char *parent_name, |
| struct regmap *regmap, |
| int set_ofs, |
| int clr_ofs, |
| int sta_ofs, |
| u8 bit, |
| const struct clk_ops *ops, |
| unsigned long flags, |
| struct device *dev); |
| |
| #define GATE_MTK_FLAGS(_id, _name, _parent, _regs, _shift, \ |
| _ops, _flags) { \ |
| .id = _id, \ |
| .name = _name, \ |
| .parent_name = _parent, \ |
| .regs = _regs, \ |
| .shift = _shift, \ |
| .ops = _ops, \ |
| .flags = _flags, \ |
| } |
| |
| #define GATE_MTK(_id, _name, _parent, _regs, _shift, _ops) \ |
| GATE_MTK_FLAGS(_id, _name, _parent, _regs, _shift, _ops, 0) |
| |
| #endif /* __DRV_CLK_GATE_H */ |