| /* SPDX-License-Identifier: GPL-2.0 */ |
| /* |
| * Copyright (c) 2020 MediaTek Inc. |
| * Author: Weiyi Lu <weiyi.lu@mediatek.com> |
| */ |
| |
| #ifndef _DT_BINDINGS_POWER_MT8183_POWER_H |
| #define _DT_BINDINGS_POWER_MT8183_POWER_H |
| |
| #define MT8183_POWER_DOMAIN_AUDIO 0 |
| #define MT8183_POWER_DOMAIN_CONN 1 |
| #define MT8183_POWER_DOMAIN_MFG_ASYNC 2 |
| #define MT8183_POWER_DOMAIN_MFG 3 |
| #define MT8183_POWER_DOMAIN_MFG_CORE0 4 |
| #define MT8183_POWER_DOMAIN_MFG_CORE1 5 |
| #define MT8183_POWER_DOMAIN_MFG_2D 6 |
| #define MT8183_POWER_DOMAIN_DISP 7 |
| #define MT8183_POWER_DOMAIN_CAM 8 |
| #define MT8183_POWER_DOMAIN_ISP 9 |
| #define MT8183_POWER_DOMAIN_VDEC 10 |
| #define MT8183_POWER_DOMAIN_VENC 11 |
| #define MT8183_POWER_DOMAIN_VPU_TOP 12 |
| #define MT8183_POWER_DOMAIN_VPU_CORE0 13 |
| #define MT8183_POWER_DOMAIN_VPU_CORE1 14 |
| |
| #endif /* _DT_BINDINGS_POWER_MT8183_POWER_H */ |
