| /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ |
| #ifndef DT_BINDINGS_CIRRUS_EP93XX_CLOCK_H |
| #define DT_BINDINGS_CIRRUS_EP93XX_CLOCK_H |
| |
| #define EP93XX_CLK_PLL1 0 |
| #define EP93XX_CLK_PLL2 1 |
| |
| #define EP93XX_CLK_FCLK 2 |
| #define EP93XX_CLK_HCLK 3 |
| #define EP93XX_CLK_PCLK 4 |
| |
| #define EP93XX_CLK_UART 5 |
| #define EP93XX_CLK_SPI 6 |
| #define EP93XX_CLK_PWM 7 |
| #define EP93XX_CLK_USB 8 |
| |
| #define EP93XX_CLK_M2M0 9 |
| #define EP93XX_CLK_M2M1 10 |
| |
| #define EP93XX_CLK_M2P0 11 |
| #define EP93XX_CLK_M2P1 12 |
| #define EP93XX_CLK_M2P2 13 |
| #define EP93XX_CLK_M2P3 14 |
| #define EP93XX_CLK_M2P4 15 |
| #define EP93XX_CLK_M2P5 16 |
| #define EP93XX_CLK_M2P6 17 |
| #define EP93XX_CLK_M2P7 18 |
| #define EP93XX_CLK_M2P8 19 |
| #define EP93XX_CLK_M2P9 20 |
| |
| #define EP93XX_CLK_UART1 21 |
| #define EP93XX_CLK_UART2 22 |
| #define EP93XX_CLK_UART3 23 |
| |
| #define EP93XX_CLK_ADC 24 |
| #define EP93XX_CLK_ADC_EN 25 |
| |
| #define EP93XX_CLK_KEYPAD 26 |
| |
| #define EP93XX_CLK_VIDEO 27 |
| |
| #define EP93XX_CLK_I2S_MCLK 28 |
| #define EP93XX_CLK_I2S_SCLK 29 |
| #define EP93XX_CLK_I2S_LRCLK 30 |
| |
| #endif /* DT_BINDINGS_CIRRUS_EP93XX_CLOCK_H */ |
