Documentation/devicetree/bindings/dma/qcom,adm.yaml

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/dma/qcom,adm.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm ADM DMA Controller

maintainers:
  - Christian Marangi <ansuelsmth@gmail.com>
  - Bjorn Andersson <bjorn.andersson@linaro.org>

description: |
  QCOM ADM DMA controller provides DMA capabilities for
  peripheral buses such as NAND and SPI.

properties:
  compatible:
    const: qcom,adm

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  "#dma-cells":
    const: 1

  clocks:
    items:
      - description: phandle to the core clock
      - description: phandle to the iface clock

  clock-names:
    items:
      - const: core
      - const: iface

  resets:
    items:
      - description: phandle to the clk reset
      - description: phandle to the pbus reset
      - description: phandle to the c0 reset
      - description: phandle to the c1 reset
      - description: phandle to the c2 reset

  reset-names:
    items:
      - const: clk
      - const: pbus
      - const: c0
      - const: c1
      - const: c2

  qcom,ee:
    $ref: /schemas/types.yaml#/definitions/uint32
    description: indicates the security domain identifier used in the secure world.
    minimum: 0
    maximum: 255

required:
  - compatible
  - reg
  - interrupts
  - "#dma-cells"
  - clocks
  - clock-names
  - resets
  - reset-names
  - qcom,ee

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/qcom,gcc-ipq806x.h>
    #include <dt-bindings/reset/qcom,gcc-ipq806x.h>

    adm_dma: dma-controller@18300000 {
        compatible = "qcom,adm";
        reg = <0x18300000 0x100000>;
        interrupts = <0 170 0>;
        #dma-cells = <1>;

        clocks = <&gcc ADM0_CLK>,
                  <&gcc ADM0_PBUS_CLK>;
        clock-names = "core", "iface";

        resets = <&gcc ADM0_RESET>,
                  <&gcc ADM0_PBUS_RESET>,
                  <&gcc ADM0_C0_RESET>,
                  <&gcc ADM0_C1_RESET>,
                  <&gcc ADM0_C2_RESET>;
        reset-names = "clk", "pbus", "c0", "c1", "c2";
        qcom,ee = <0>;
    };

...