| # SPDX-License-Identifier: GPL-2.0-only |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/clock/rockchip,rk3399-cru.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: Rockchip RK3399 Clock and Reset Unit |
| |
| maintainers: |
| - Xing Zheng <zhengxing@rock-chips.com> |
| - Heiko Stuebner <heiko@sntech.de> |
| |
| description: | |
| The RK3399 clock controller generates and supplies clock to various |
| controllers within the SoC and also implements a reset controller for SoC |
| peripherals. |
| Each clock is assigned an identifier and client nodes can use this identifier |
| to specify the clock which they consume. All available clocks are defined as |
| preprocessor macros in the dt-bindings/clock/rk3399-cru.h headers and can be |
| used in device tree sources. Similar macros exist for the reset sources in |
| these files. |
| There are several clocks that are generated outside the SoC. It is expected |
| that they are defined using standard clock bindings with following |
| clock-output-names: |
| - "xin24m" - crystal input - required, |
| - "xin32k" - rtc clock - optional, |
| - "clkin_gmac" - external GMAC clock - optional, |
| - "clkin_i2s" - external I2S clock - optional, |
| - "pclkin_cif" - external ISP clock - optional, |
| - "clk_usbphy0_480m" - output clock of the pll in the usbphy0 |
| - "clk_usbphy1_480m" - output clock of the pll in the usbphy1 |
| |
| properties: |
| compatible: |
| enum: |
| - rockchip,rk3399-pmucru |
| - rockchip,rk3399-cru |
| |
| reg: |
| maxItems: 1 |
| |
| "#clock-cells": |
| const: 1 |
| |
| "#reset-cells": |
| const: 1 |
| |
| clocks: |
| minItems: 1 |
| |
| assigned-clocks: |
| minItems: 1 |
| maxItems: 64 |
| |
| assigned-clock-parents: |
| minItems: 1 |
| maxItems: 64 |
| |
| assigned-clock-rates: |
| minItems: 1 |
| maxItems: 64 |
| |
| rockchip,grf: |
| $ref: /schemas/types.yaml#/definitions/phandle |
| description: > |
| phandle to the syscon managing the "general register files". It is used |
| for GRF muxes, if missing any muxes present in the GRF will not be |
| available. |
| |
| required: |
| - compatible |
| - reg |
| - "#clock-cells" |
| - "#reset-cells" |
| |
| additionalProperties: false |
| |
| examples: |
| - | |
| pmucru: pmu-clock-controller@ff750000 { |
| compatible = "rockchip,rk3399-pmucru"; |
| reg = <0xff750000 0x1000>; |
| #clock-cells = <1>; |
| #reset-cells = <1>; |
| }; |
| - | |
| cru: clock-controller@ff760000 { |
| compatible = "rockchip,rk3399-cru"; |
| reg = <0xff760000 0x1000>; |
| #clock-cells = <1>; |
| #reset-cells = <1>; |
| }; |