Documentation/devicetree/bindings/thermal/imx-thermal.yaml

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/thermal/imx-thermal.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: NXP i.MX Thermal Binding

maintainers:
  - Shawn Guo <shawnguo@kernel.org>
  - Anson Huang <Anson.Huang@nxp.com>

properties:
  compatible:
    enum:
      - fsl,imx6q-tempmon
      - fsl,imx6sx-tempmon
      - fsl,imx7d-tempmon

  interrupts:
    description: |
      The interrupt output of the controller, i.MX6Q has IRQ_HIGH which
      will be triggered when temperature is higher than high threshold,
      i.MX6SX and i.MX7S/D have two more IRQs than i.MX6Q, one is IRQ_LOW
      and the other is IRQ_PANIC, when temperature is lower than low
      threshold, IRQ_LOW will be triggered, when temperature is higher
      than panic threshold, IRQ_PANIC will be triggered, and system can
      be configured to auto reboot by SRC module for IRQ_PANIC. IRQ_HIGH,
      IRQ_LOW and IRQ_PANIC share same interrupt output of controller.
    maxItems: 1

  nvmem-cells:
    items:
      - description: Phandle to the calibration data provided by ocotp
      - description: Phandle to the temperature grade provided by ocotp

  nvmem-cell-names:
    items:
      - const: calib
      - const: temp_grade

  fsl,tempmon:
    $ref: '/schemas/types.yaml#/definitions/phandle'
    description: Phandle to anatop system controller node.

  fsl,tempmon-data:
    $ref: '/schemas/types.yaml#/definitions/phandle'
    description: |
      Deprecated property, phandle pointer to fuse controller that contains
      TEMPMON calibration data, e.g. OCOTP on imx6q. The details about
      calibration data can be found in SoC Reference Manual.
    deprecated: true

  clocks:
    maxItems: 1

required:
  - compatible
  - interrupts
  - fsl,tempmon
  - nvmem-cells
  - nvmem-cell-names

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/imx6sx-clock.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>

    efuse@21bc000 {
         #address-cells = <1>;
         #size-cells = <1>;
         compatible = "fsl,imx6sx-ocotp", "syscon";
         reg = <0x021bc000 0x4000>;
         clocks = <&clks IMX6SX_CLK_OCOTP>;

         tempmon_calib: calib@38 {
             reg = <0x38 4>;
         };

         tempmon_temp_grade: temp-grade@20 {
             reg = <0x20 4>;
         };
    };

    anatop@20c8000 {
        compatible = "fsl,imx6q-anatop", "syscon", "simple-mfd";
        reg = <0x020c8000 0x1000>;
        interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>,
                     <0 54 IRQ_TYPE_LEVEL_HIGH>,
                     <0 127 IRQ_TYPE_LEVEL_HIGH>;

        tempmon {
             compatible = "fsl,imx6sx-tempmon";
             interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
             fsl,tempmon = <&anatop>;
             nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>;
             nvmem-cell-names = "calib", "temp_grade";
             clocks = <&clks IMX6SX_CLK_PLL3_USB_OTG>;
        };
    };