| /* |
| * Copyright 2004-2009 Analog Devices Inc. |
| * 2008-2009 Bluetechnix |
| * 2005 National ICT Australia (NICTA) |
| * Aidan Williams <aidan@nicta.com.au> |
| * |
| * Licensed under the GPL-2 or later. |
| */ |
| |
| #include <linux/device.h> |
| #include <linux/platform_device.h> |
| #include <linux/mtd/mtd.h> |
| #include <linux/mtd/partitions.h> |
| #include <linux/mtd/physmap.h> |
| #include <linux/spi/spi.h> |
| #include <linux/spi/flash.h> |
| #include <linux/spi/mmc_spi.h> |
| #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) |
| #include <linux/usb/isp1362.h> |
| #endif |
| #include <linux/irq.h> |
| #include <asm/dma.h> |
| #include <asm/bfin5xx_spi.h> |
| #include <asm/portmux.h> |
| #include <asm/dpmc.h> |
| |
| /* |
| * Name the Board for the /proc/cpuinfo |
| */ |
| const char bfin_board_name[] = "Bluetechnix CM BF533"; |
| |
| #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) |
| /* all SPI peripherals info goes here */ |
| #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) |
| static struct mtd_partition bfin_spi_flash_partitions[] = { |
| { |
| .name = "bootloader(spi)", |
| .size = 0x00020000, |
| .offset = 0, |
| .mask_flags = MTD_CAP_ROM |
| }, { |
| .name = "linux kernel(spi)", |
| .size = 0xe0000, |
| .offset = 0x20000 |
| }, { |
| .name = "file system(spi)", |
| .size = 0x700000, |
| .offset = 0x00100000, |
| } |
| }; |
| |
| static struct flash_platform_data bfin_spi_flash_data = { |
| .name = "m25p80", |
| .parts = bfin_spi_flash_partitions, |
| .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions), |
| .type = "m25p64", |
| }; |
| |
| /* SPI flash chip (m25p64) */ |
| static struct bfin5xx_spi_chip spi_flash_chip_info = { |
| .enable_dma = 0, /* use dma transfer with this chip*/ |
| .bits_per_word = 8, |
| }; |
| #endif |
| |
| /* SPI ADC chip */ |
| #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE) |
| static struct bfin5xx_spi_chip spi_adc_chip_info = { |
| .enable_dma = 1, /* use dma transfer with this chip*/ |
| .bits_per_word = 16, |
| }; |
| #endif |
| |
| #if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE) |
| static struct bfin5xx_spi_chip ad1836_spi_chip_info = { |
| .enable_dma = 0, |
| .bits_per_word = 16, |
| }; |
| #endif |
| |
| #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
| static struct bfin5xx_spi_chip mmc_spi_chip_info = { |
| .enable_dma = 0, |
| .bits_per_word = 8, |
| }; |
| #endif |
| |
| static struct spi_board_info bfin_spi_board_info[] __initdata = { |
| #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) |
| { |
| /* the modalias must be the same as spi device driver name */ |
| .modalias = "m25p80", /* Name of spi_driver for this device */ |
| .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ |
| .bus_num = 0, /* Framework bus number */ |
| .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/ |
| .platform_data = &bfin_spi_flash_data, |
| .controller_data = &spi_flash_chip_info, |
| .mode = SPI_MODE_3, |
| }, |
| #endif |
| |
| #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE) |
| { |
| .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ |
| .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ |
| .bus_num = 0, /* Framework bus number */ |
| .chip_select = 2, /* Framework chip select. */ |
| .platform_data = NULL, /* No spi_driver specific config */ |
| .controller_data = &spi_adc_chip_info, |
| }, |
| #endif |
| |
| #if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE) |
| { |
| .modalias = "ad183x", |
| .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ |
| .bus_num = 0, |
| .chip_select = 4, |
| .controller_data = &ad1836_spi_chip_info, |
| }, |
| #endif |
| |
| #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
| { |
| .modalias = "mmc_spi", |
| .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ |
| .bus_num = 0, |
| .chip_select = 1, |
| .controller_data = &mmc_spi_chip_info, |
| .mode = SPI_MODE_3, |
| }, |
| #endif |
| }; |
| |
| /* SPI (0) */ |
| static struct resource bfin_spi0_resource[] = { |
| [0] = { |
| .start = SPI0_REGBASE, |
| .end = SPI0_REGBASE + 0xFF, |
| .flags = IORESOURCE_MEM, |
| }, |
| [1] = { |
| .start = CH_SPI, |
| .end = CH_SPI, |
| .flags = IORESOURCE_DMA, |
| }, |
| [2] = { |
| .start = IRQ_SPI, |
| .end = IRQ_SPI, |
| .flags = IORESOURCE_IRQ, |
| } |
| }; |
| |
| /* SPI controller data */ |
| static struct bfin5xx_spi_master bfin_spi0_info = { |
| .num_chipselect = 8, |
| .enable_dma = 1, /* master has the ability to do dma transfer */ |
| .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0}, |
| }; |
| |
| static struct platform_device bfin_spi0_device = { |
| .name = "bfin-spi", |
| .id = 0, /* Bus number */ |
| .num_resources = ARRAY_SIZE(bfin_spi0_resource), |
| .resource = bfin_spi0_resource, |
| .dev = { |
| .platform_data = &bfin_spi0_info, /* Passed to driver */ |
| }, |
| }; |
| #endif /* spi master and devices */ |
| |
| #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) |
| static struct platform_device rtc_device = { |
| .name = "rtc-bfin", |
| .id = -1, |
| }; |
| #endif |
| |
| #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) |
| #include <linux/smc91x.h> |
| |
| static struct smc91x_platdata smc91x_info = { |
| .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT, |
| .leda = RPC_LED_100_10, |
| .ledb = RPC_LED_TX_RX, |
| }; |
| |
| static struct resource smc91x_resources[] = { |
| { |
| .start = 0x20200300, |
| .end = 0x20200300 + 16, |
| .flags = IORESOURCE_MEM, |
| }, { |
| .start = IRQ_PF0, |
| .end = IRQ_PF0, |
| .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, |
| }, |
| }; |
| static struct platform_device smc91x_device = { |
| .name = "smc91x", |
| .id = 0, |
| .num_resources = ARRAY_SIZE(smc91x_resources), |
| .resource = smc91x_resources, |
| .dev = { |
| .platform_data = &smc91x_info, |
| }, |
| }; |
| #endif |
| |
| #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) |
| #include <linux/smsc911x.h> |
| |
| static struct resource smsc911x_resources[] = { |
| { |
| .name = "smsc911x-memory", |
| .start = 0x20308000, |
| .end = 0x20308000 + 0xFF, |
| .flags = IORESOURCE_MEM, |
| }, { |
| .start = IRQ_PF8, |
| .end = IRQ_PF8, |
| .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, |
| }, |
| }; |
| |
| static struct smsc911x_platform_config smsc911x_config = { |
| .flags = SMSC911X_USE_16BIT, |
| .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, |
| .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN, |
| .phy_interface = PHY_INTERFACE_MODE_MII, |
| }; |
| |
| static struct platform_device smsc911x_device = { |
| .name = "smsc911x", |
| .id = 0, |
| .num_resources = ARRAY_SIZE(smsc911x_resources), |
| .resource = smsc911x_resources, |
| .dev = { |
| .platform_data = &smsc911x_config, |
| }, |
| }; |
| #endif |
| |
| #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) |
| #ifdef CONFIG_SERIAL_BFIN_UART0 |
| static struct resource bfin_uart0_resources[] = { |
| { |
| .start = BFIN_UART_THR, |
| .end = BFIN_UART_GCTL+2, |
| .flags = IORESOURCE_MEM, |
| }, |
| { |
| .start = IRQ_UART0_RX, |
| .end = IRQ_UART0_RX + 1, |
| .flags = IORESOURCE_IRQ, |
| }, |
| { |
| .start = IRQ_UART0_ERROR, |
| .end = IRQ_UART0_ERROR, |
| .flags = IORESOURCE_IRQ, |
| }, |
| { |
| .start = CH_UART0_TX, |
| .end = CH_UART0_TX, |
| .flags = IORESOURCE_DMA, |
| }, |
| { |
| .start = CH_UART0_RX, |
| .end = CH_UART0_RX, |
| .flags = IORESOURCE_DMA, |
| }, |
| }; |
| |
| static unsigned short bfin_uart0_peripherals[] = { |
| P_UART0_TX, P_UART0_RX, 0 |
| }; |
| |
| static struct platform_device bfin_uart0_device = { |
| .name = "bfin-uart", |
| .id = 0, |
| .num_resources = ARRAY_SIZE(bfin_uart0_resources), |
| .resource = bfin_uart0_resources, |
| .dev = { |
| .platform_data = &bfin_uart0_peripherals, /* Passed to driver */ |
| }, |
| }; |
| #endif |
| #endif |
| |
| #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) |
| #ifdef CONFIG_BFIN_SIR0 |
| static struct resource bfin_sir0_resources[] = { |
| { |
| .start = 0xFFC00400, |
| .end = 0xFFC004FF, |
| .flags = IORESOURCE_MEM, |
| }, |
| { |
| .start = IRQ_UART0_RX, |
| .end = IRQ_UART0_RX+1, |
| .flags = IORESOURCE_IRQ, |
| }, |
| { |
| .start = CH_UART0_RX, |
| .end = CH_UART0_RX+1, |
| .flags = IORESOURCE_DMA, |
| }, |
| }; |
| |
| static struct platform_device bfin_sir0_device = { |
| .name = "bfin_sir", |
| .id = 0, |
| .num_resources = ARRAY_SIZE(bfin_sir0_resources), |
| .resource = bfin_sir0_resources, |
| }; |
| #endif |
| #endif |
| |
| #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) |
| #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART |
| static struct resource bfin_sport0_uart_resources[] = { |
| { |
| .start = SPORT0_TCR1, |
| .end = SPORT0_MRCS3+4, |
| .flags = IORESOURCE_MEM, |
| }, |
| { |
| .start = IRQ_SPORT0_RX, |
| .end = IRQ_SPORT0_RX+1, |
| .flags = IORESOURCE_IRQ, |
| }, |
| { |
| .start = IRQ_SPORT0_ERROR, |
| .end = IRQ_SPORT0_ERROR, |
| .flags = IORESOURCE_IRQ, |
| }, |
| }; |
| |
| static unsigned short bfin_sport0_peripherals[] = { |
| P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS, |
| P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0 |
| }; |
| |
| static struct platform_device bfin_sport0_uart_device = { |
| .name = "bfin-sport-uart", |
| .id = 0, |
| .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources), |
| .resource = bfin_sport0_uart_resources, |
| .dev = { |
| .platform_data = &bfin_sport0_peripherals, /* Passed to driver */ |
| }, |
| }; |
| #endif |
| #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART |
| static struct resource bfin_sport1_uart_resources[] = { |
| { |
| .start = SPORT1_TCR1, |
| .end = SPORT1_MRCS3+4, |
| .flags = IORESOURCE_MEM, |
| }, |
| { |
| .start = IRQ_SPORT1_RX, |
| .end = IRQ_SPORT1_RX+1, |
| .flags = IORESOURCE_IRQ, |
| }, |
| { |
| .start = IRQ_SPORT1_ERROR, |
| .end = IRQ_SPORT1_ERROR, |
| .flags = IORESOURCE_IRQ, |
| }, |
| }; |
| |
| static unsigned short bfin_sport1_peripherals[] = { |
| P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS, |
| P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0 |
| }; |
| |
| static struct platform_device bfin_sport1_uart_device = { |
| .name = "bfin-sport-uart", |
| .id = 1, |
| .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources), |
| .resource = bfin_sport1_uart_resources, |
| .dev = { |
| .platform_data = &bfin_sport1_peripherals, /* Passed to driver */ |
| }, |
| }; |
| #endif |
| #endif |
| |
| #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) |
| static struct resource isp1362_hcd_resources[] = { |
| { |
| .start = 0x20308000, |
| .end = 0x20308000, |
| .flags = IORESOURCE_MEM, |
| }, { |
| .start = 0x20308004, |
| .end = 0x20308004, |
| .flags = IORESOURCE_MEM, |
| }, { |
| .start = IRQ_PF4, |
| .end = IRQ_PF4, |
| .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE, |
| }, |
| }; |
| |
| static struct isp1362_platform_data isp1362_priv = { |
| .sel15Kres = 1, |
| .clknotstop = 0, |
| .oc_enable = 0, |
| .int_act_high = 0, |
| .int_edge_triggered = 0, |
| .remote_wakeup_connected = 0, |
| .no_power_switching = 1, |
| .power_switching_mode = 0, |
| }; |
| |
| static struct platform_device isp1362_hcd_device = { |
| .name = "isp1362-hcd", |
| .id = 0, |
| .dev = { |
| .platform_data = &isp1362_priv, |
| }, |
| .num_resources = ARRAY_SIZE(isp1362_hcd_resources), |
| .resource = isp1362_hcd_resources, |
| }; |
| #endif |
| |
| |
| #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) |
| static struct resource net2272_bfin_resources[] = { |
| { |
| .start = 0x20300000, |
| .end = 0x20300000 + 0x100, |
| .flags = IORESOURCE_MEM, |
| }, { |
| .start = IRQ_PF6, |
| .end = IRQ_PF6, |
| .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, |
| }, |
| }; |
| |
| static struct platform_device net2272_bfin_device = { |
| .name = "net2272", |
| .id = -1, |
| .num_resources = ARRAY_SIZE(net2272_bfin_resources), |
| .resource = net2272_bfin_resources, |
| }; |
| #endif |
| |
| |
| |
| #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) |
| static struct mtd_partition para_partitions[] = { |
| { |
| .name = "bootloader(nor)", |
| .size = 0x40000, |
| .offset = 0, |
| }, { |
| .name = "linux+rootfs(nor)", |
| .size = MTDPART_SIZ_FULL, |
| .offset = MTDPART_OFS_APPEND, |
| }, |
| }; |
| |
| static struct physmap_flash_data para_flash_data = { |
| .width = 2, |
| .parts = para_partitions, |
| .nr_parts = ARRAY_SIZE(para_partitions), |
| }; |
| |
| static struct resource para_flash_resource = { |
| .start = 0x20000000, |
| .end = 0x201fffff, |
| .flags = IORESOURCE_MEM, |
| }; |
| |
| static struct platform_device para_flash_device = { |
| .name = "physmap-flash", |
| .id = 0, |
| .dev = { |
| .platform_data = ¶_flash_data, |
| }, |
| .num_resources = 1, |
| .resource = ¶_flash_resource, |
| }; |
| #endif |
| |
| |
| |
| static const unsigned int cclk_vlev_datasheet[] = |
| { |
| VRPAIR(VLEV_085, 250000000), |
| VRPAIR(VLEV_090, 376000000), |
| VRPAIR(VLEV_095, 426000000), |
| VRPAIR(VLEV_100, 426000000), |
| VRPAIR(VLEV_105, 476000000), |
| VRPAIR(VLEV_110, 476000000), |
| VRPAIR(VLEV_115, 476000000), |
| VRPAIR(VLEV_120, 600000000), |
| VRPAIR(VLEV_125, 600000000), |
| VRPAIR(VLEV_130, 600000000), |
| }; |
| |
| static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = { |
| .tuple_tab = cclk_vlev_datasheet, |
| .tabsize = ARRAY_SIZE(cclk_vlev_datasheet), |
| .vr_settling_time = 25 /* us */, |
| }; |
| |
| static struct platform_device bfin_dpmc = { |
| .name = "bfin dpmc", |
| .dev = { |
| .platform_data = &bfin_dmpc_vreg_data, |
| }, |
| }; |
| |
| static struct platform_device *cm_bf533_devices[] __initdata = { |
| |
| &bfin_dpmc, |
| |
| #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) |
| #ifdef CONFIG_SERIAL_BFIN_UART0 |
| &bfin_uart0_device, |
| #endif |
| #endif |
| |
| #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) |
| #ifdef CONFIG_BFIN_SIR0 |
| &bfin_sir0_device, |
| #endif |
| #endif |
| |
| #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) |
| #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART |
| &bfin_sport0_uart_device, |
| #endif |
| #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART |
| &bfin_sport1_uart_device, |
| #endif |
| #endif |
| |
| #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) |
| &rtc_device, |
| #endif |
| |
| #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) |
| &isp1362_hcd_device, |
| #endif |
| |
| #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) |
| &smc91x_device, |
| #endif |
| |
| #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) |
| &smsc911x_device, |
| #endif |
| |
| #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) |
| &net2272_bfin_device, |
| #endif |
| |
| #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) |
| &bfin_spi0_device, |
| #endif |
| |
| #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) |
| ¶_flash_device, |
| #endif |
| }; |
| |
| static int __init cm_bf533_init(void) |
| { |
| printk(KERN_INFO "%s(): registering device resources\n", __func__); |
| platform_add_devices(cm_bf533_devices, ARRAY_SIZE(cm_bf533_devices)); |
| #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) |
| spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); |
| #endif |
| return 0; |
| } |
| |
| arch_initcall(cm_bf533_init); |
| |
| static struct platform_device *cm_bf533_early_devices[] __initdata = { |
| #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK) |
| #ifdef CONFIG_SERIAL_BFIN_UART0 |
| &bfin_uart0_device, |
| #endif |
| #endif |
| |
| #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE) |
| #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART |
| &bfin_sport0_uart_device, |
| #endif |
| #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART |
| &bfin_sport1_uart_device, |
| #endif |
| #endif |
| }; |
| |
| void __init native_machine_early_platform_add_devices(void) |
| { |
| printk(KERN_INFO "register early platform devices\n"); |
| early_platform_add_devices(cm_bf533_early_devices, |
| ARRAY_SIZE(cm_bf533_early_devices)); |
| } |
