Documentation/devicetree/bindings/phy/allwinner,sun50i-a64-usb-phy.yaml

# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/phy/allwinner,sun50i-a64-usb-phy.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Allwinner A64 USB PHY

maintainers:
  - Chen-Yu Tsai <wens@csie.org>
  - Maxime Ripard <mripard@kernel.org>

properties:
  "#phy-cells":
    const: 1

  compatible:
    enum:
      - allwinner,sun20i-d1-usb-phy
      - allwinner,sun50i-a64-usb-phy

  reg:
    items:
      - description: PHY Control registers
      - description: PHY PMU0 registers
      - description: PHY PMU1 registers

  reg-names:
    items:
      - const: phy_ctrl
      - const: pmu0
      - const: pmu1

  clocks:
    items:
      - description: USB OTG PHY bus clock
      - description: USB Host 0 PHY bus clock

  clock-names:
    items:
      - const: usb0_phy
      - const: usb1_phy

  resets:
    items:
      - description: USB OTG reset
      - description: USB Host 1 Controller reset

  reset-names:
    items:
      - const: usb0_reset
      - const: usb1_reset

  usb0_id_det-gpios:
    maxItems: 1
    description: GPIO to the USB OTG ID pin

  usb0_vbus_det-gpios:
    maxItems: 1
    description: GPIO to the USB OTG VBUS detect pin

  usb0_vbus_power-supply:
    description: Power supply to detect the USB OTG VBUS

  usb0_vbus-supply:
    description: Regulator controlling USB OTG VBUS

  usb1_vbus-supply:
    description: Regulator controlling USB1 Host controller

required:
  - "#phy-cells"
  - compatible
  - clocks
  - clock-names
  - reg
  - reg-names
  - resets
  - reset-names

additionalProperties: false

examples:
  - |
    #include <dt-bindings/gpio/gpio.h>
    #include <dt-bindings/clock/sun50i-a64-ccu.h>
    #include <dt-bindings/reset/sun50i-a64-ccu.h>

    phy@1c19400 {
        #phy-cells = <1>;
        compatible = "allwinner,sun50i-a64-usb-phy";
        reg = <0x01c19400 0x14>,
              <0x01c1a800 0x4>,
              <0x01c1b800 0x4>;
        reg-names = "phy_ctrl",
                    "pmu0",
                    "pmu1";
        clocks = <&ccu CLK_USB_PHY0>,
                 <&ccu CLK_USB_PHY1>;
        clock-names = "usb0_phy",
                      "usb1_phy";
        resets = <&ccu RST_USB_PHY0>,
                 <&ccu RST_USB_PHY1>;
        reset-names = "usb0_reset",
                      "usb1_reset";
        usb0_id_det-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */
        usb0_vbus_power-supply = <&usb_power_supply>;
        usb0_vbus-supply = <&reg_drivevbus>;
        usb1_vbus-supply = <&reg_usb1_vbus>;
    };