| # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/clock/qcom,kpss-acc-v1.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: Krait Processor Sub-system (KPSS) Application Clock Controller (ACC) v1 |
| |
| maintainers: |
| - Christian Marangi <ansuelsmth@gmail.com> |
| |
| description: |
| The KPSS ACC provides clock, power domain, and reset control to a Krait CPU. |
| There is one ACC register region per CPU within the KPSS remapped region as |
| well as an alias register region that remaps accesses to the ACC associated |
| with the CPU accessing the region. ACC v1 is currently used as a |
| clock-controller for enabling the cpu and handling the aux clocks. |
| |
| properties: |
| compatible: |
| const: qcom,kpss-acc-v1 |
| |
| reg: |
| items: |
| - description: Base address and size of the register region |
| - description: Optional base address and size of the alias register region |
| minItems: 1 |
| |
| clocks: |
| minItems: 2 |
| maxItems: 2 |
| |
| clock-names: |
| items: |
| - const: pll8_vote |
| - const: pxo |
| |
| clock-output-names: |
| description: Name of the aux clock. Krait can have at most 4 cpu. |
| enum: |
| - acpu0_aux |
| - acpu1_aux |
| - acpu2_aux |
| - acpu3_aux |
| |
| '#clock-cells': |
| const: 0 |
| |
| required: |
| - compatible |
| - reg |
| - clocks |
| - clock-names |
| - clock-output-names |
| - '#clock-cells' |
| |
| additionalProperties: false |
| |
| examples: |
| - | |
| #include <dt-bindings/clock/qcom,gcc-ipq806x.h> |
| |
| clock-controller@2088000 { |
| compatible = "qcom,kpss-acc-v1"; |
| reg = <0x02088000 0x1000>, <0x02008000 0x1000>; |
| clocks = <&gcc PLL8_VOTE>, <&pxo_board>; |
| clock-names = "pll8_vote", "pxo"; |
| clock-output-names = "acpu0_aux"; |
| #clock-cells = <0>; |
| }; |
| |
| ... |