| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/clock/qcom,sc7280-lpasscc.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: Qualcomm LPASS Core Clock Controller on SC7280 |
| |
| maintainers: |
| - Taniya Das <quic_tdas@quicinc.com> |
| |
| description: | |
| Qualcomm LPASS core clock control module provides the clocks and power |
| domains on SC7280. |
| |
| See also:: include/dt-bindings/clock/qcom,lpass-sc7280.h |
| |
| properties: |
| compatible: |
| enum: |
| - qcom,sc7280-lpasscc |
| |
| clocks: |
| items: |
| - description: gcc_cfg_noc_lpass_clk from GCC |
| |
| clock-names: |
| items: |
| - const: iface |
| |
| '#clock-cells': |
| const: 1 |
| |
| reg: |
| items: |
| - description: LPASS qdsp6ss register |
| - description: LPASS top-cc register |
| |
| reg-names: |
| items: |
| - const: qdsp6ss |
| - const: top_cc |
| |
| qcom,adsp-pil-mode: |
| description: |
| Indicates if the LPASS would be brought out of reset using |
| remoteproc peripheral loader. |
| type: boolean |
| |
| required: |
| - compatible |
| - reg |
| - clocks |
| - clock-names |
| - '#clock-cells' |
| |
| additionalProperties: false |
| |
| examples: |
| - | |
| #include <dt-bindings/clock/qcom,gcc-sc7280.h> |
| #include <dt-bindings/clock/qcom,lpass-sc7280.h> |
| clock-controller@3000000 { |
| compatible = "qcom,sc7280-lpasscc"; |
| reg = <0x03000000 0x40>, <0x03c04000 0x4>; |
| reg-names = "qdsp6ss", "top_cc"; |
| clocks = <&gcc GCC_CFG_NOC_LPASS_CLK>; |
| clock-names = "iface"; |
| qcom,adsp-pil-mode; |
| #clock-cells = <1>; |
| }; |
| ... |