| * Amlogic GXBB Clock and Reset Unit |
| |
| The Amlogic GXBB clock controller generates and supplies clock to various |
| controllers within the SoC. |
| |
| Required Properties: |
| |
| - compatible: should be: |
| "amlogic,gxbb-clkc" for GXBB SoC, |
| "amlogic,gxl-clkc" for GXL and GXM SoC, |
| "amlogic,axg-clkc" for AXG SoC. |
| |
| - reg: physical base address of the clock controller and length of memory |
| mapped region. |
| |
| - #clock-cells: should be 1. |
| |
| Each clock is assigned an identifier and client nodes can use this identifier |
| to specify the clock which they consume. All available clocks are defined as |
| preprocessor macros in the dt-bindings/clock/gxbb-clkc.h header and can be |
| used in device tree sources. |
| |
| Example: Clock controller node: |
| |
| clkc: clock-controller@c883c000 { |
| #clock-cells = <1>; |
| compatible = "amlogic,gxbb-clkc"; |
| reg = <0x0 0xc883c000 0x0 0x3db>; |
| }; |
| |
| Example: UART controller node that consumes the clock generated by the clock |
| controller: |
| |
| uart_AO: serial@c81004c0 { |
| compatible = "amlogic,meson-uart"; |
| reg = <0xc81004c0 0x14>; |
| interrupts = <0 90 1>; |
| clocks = <&clkc CLKID_CLK81>; |
| }; |