arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts

// SPDX-License-Identifier: GPL-2.0
/*
 * Samsung ExynosAutov9 SADK board device tree source
 *
 * Copyright (c) 2021 Samsung Electronics Co., Ltd.
 *
 */

/dts-v1/;
#include "exynosautov9.dtsi"
#include <dt-bindings/gpio/gpio.h>

/ {
	model = "Samsung ExynosAuto v9 SADK board";
	compatible = "samsung,exynosautov9-sadk", "samsung,exynosautov9";

	#address-cells = <2>;
	#size-cells = <2>;

	aliases {
		serial0 = &serial_0;
	};

	chosen {
		stdout-path = &serial_0;
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x0 0x80000000 0x0 0x77000000>,
		      <0x8 0x80000000 0x1 0x7ba00000>,
		      <0xa 0x00000000 0x2 0x00000000>;
	};

	ufs_0_fixed_vcc_reg: regulator-0 {
		compatible = "regulator-fixed";
		regulator-name = "ufs-vcc";
		gpio = <&gpq0 1 GPIO_ACTIVE_HIGH>;
		regulator-boot-on;
		enable-active-high;
	};

	ufs_1_fixed_vcc_reg: regulator-1 {
		compatible = "regulator-fixed";
		regulator-name = "ufs-vcc";
		gpio = <&gpg2 2 GPIO_ACTIVE_HIGH>;
		regulator-boot-on;
		enable-active-high;
	};
};

&serial_0 {
	pinctrl-0 = <&uart0_bus_dual>;
	status = "okay";
};

&ufs_0_phy {
	status = "okay";
};

&ufs_1_phy {
	status = "okay";
};

&ufs_0 {
	status = "okay";
	vcc-supply = <&ufs_0_fixed_vcc_reg>;
};

&ufs_1 {
	status = "okay";
	vcc-supply = <&ufs_1_fixed_vcc_reg>;
};

&usi_0 {
	samsung,clkreq-on; /* needed for UART mode */
	status = "okay";
};

&xtcxo {
	clock-frequency = <26000000>;
};