Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/nvmem/qcom,qfprom.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm Technologies Inc, QFPROM Efuse bindings

maintainers:
  - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>

allOf:
  - $ref: "nvmem.yaml#"

properties:
  compatible:
    items:
      - enum:
          - qcom,apq8064-qfprom
          - qcom,apq8084-qfprom
          - qcom,msm8974-qfprom
          - qcom,msm8916-qfprom
          - qcom,msm8996-qfprom
          - qcom,msm8998-qfprom
          - qcom,qcs404-qfprom
          - qcom,sc7180-qfprom
          - qcom,sdm845-qfprom
      - const: qcom,qfprom

  reg:
    # If the QFPROM is read-only OS image then only the corrected region
    # needs to be provided.  If the QFPROM is writable then all 4 regions
    # must be provided.
    oneOf:
      - items:
          - description: The corrected region.
      - items:
          - description: The corrected region.
          - description: The raw region.
          - description: The config region.
          - description: The security control region.

  # Clock must be provided if QFPROM is writable from the OS image.
  clocks:
    maxItems: 1
  clock-names:
    const: core

  # Supply reference must be provided if QFPROM is writable from the OS image.
  vcc-supply:
    description: Our power supply.

  # Needed if any child nodes are present.
  "#address-cells":
    const: 1
  "#size-cells":
    const: 1

required:
  - compatible
  - reg

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/clock/qcom,gcc-sc7180.h>

    soc {
      #address-cells = <2>;
      #size-cells = <2>;

      efuse@784000 {
        compatible = "qcom,sc7180-qfprom", "qcom,qfprom";
        reg = <0 0x00784000 0 0x8ff>,
              <0 0x00780000 0 0x7a0>,
              <0 0x00782000 0 0x100>,
              <0 0x00786000 0 0x1fff>;
        clocks = <&gcc GCC_SEC_CTRL_CLK_SRC>;
        clock-names = "core";
        #address-cells = <1>;
        #size-cells = <1>;

        vcc-supply = <&vreg_l11a_1p8>;

        hstx-trim-primary@25b {
          reg = <0x25b 0x1>;
          bits = <1 3>;
        };
      };
    };

  - |
    soc {
      #address-cells = <2>;
      #size-cells = <2>;

      efuse@784000 {
        compatible = "qcom,sdm845-qfprom", "qcom,qfprom";
        reg = <0 0x00784000 0 0x8ff>;
        #address-cells = <1>;
        #size-cells = <1>;

        hstx-trim-primary@1eb {
          reg = <0x1eb 0x1>;
          bits = <1 4>;
        };
      };
    };